- Tytuł:
- Standardization of the compact model coding: non-fully depleted SOI MOSFET example
- Autorzy:
-
Grabiński, W.
Tomaszewski, D.
Lemaitre, L.
Jakubowski, A. - Powiązania:
- https://bibliotekanauki.pl/articles/308862.pdf
- Data publikacji:
- 2005
- Wydawca:
- Instytut Łączności - Państwowy Instytut Badawczy
- Tematy:
-
Verilog-AMS
compact model coding
SOI MOSFET - Opis:
- The initiative to standardize compact (SPICE-like) modelling has recently gained momentum in the semiconductor industry. Some of the important issues of the compact modelling must be addressed, such as accuracy, testing, availability, version control, verification and validation. Most compact models developed in the past did not account for these key issues which are of highest importance when introducing a new compact model to the semiconductor industry in particular going beyond the ITRS roadmap technological 100 nm node. An important application for non-fully depleted SOI technology is high performance microprocessors, other high speed logic chips, as well as analogue RF circuits. The IC design process requires a compact model that describes in detail the electrical characteristics of SOI MOSFET transistors. In this paper a non-fully depleted SOI MOSFET model and its Verilog-AMS description will be presented.
- Źródło:
-
Journal of Telecommunications and Information Technology; 2005, 1; 135-141
1509-4553
1899-8852 - Pojawia się w:
- Journal of Telecommunications and Information Technology
- Dostawca treści:
- Biblioteka Nauki
Artykuł