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Wyszukujesz frazę "switched-capacitor" wg kryterium: Temat


Wyświetlanie 1-10 z 10
Tytuł:
Dynamically programmable analog arrays in acoustic frequency range signal processing
Autorzy:
Falkowski, P.
Mechler, A.
Powiązania:
https://bibliotekanauki.pl/articles/221037.pdf
Data publikacji:
2011
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
FPAA
audio processing
switched-capacitor
analog circuits design
Opis:
Field programmable analog arrays (FPAA), thanks to their flexibility and reconfigurability, give the designers quite new possibilities in analog circuit design. The number of both academic projects on FPAA and applications of commercially available programmable devices is still growing. This paper explores the properties and parameters of two most popular FPAA circuits: the AnadigmVortex AN221E04 and AnadigmApex AN231E04 from the Anadigm company. The research conducted by the authors led to the discovery of some undocumented features of these devices. Several applications for audio processing were built and tested. The results show that these circuits can be used in medium-demanding audio applications. Thanks to dynamic reconfigurability, they also allow to build an universal analog audio signal processor. These circuits can also act as a versatile platform for rapid prototyping and educational purposes.
Źródło:
Metrology and Measurement Systems; 2011, 18, 1; 77-89
0860-8229
Pojawia się w:
Metrology and Measurement Systems
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Boosting resonant switched-capacitor voltage tripler
Autorzy:
Chojowski, Maciej
Sosnowski, Robert
Baszyński, Marcin
Powiązania:
https://bibliotekanauki.pl/articles/24202737.pdf
Data publikacji:
2023
Wydawca:
Polska Akademia Nauk. Czasopisma i Monografie PAN
Tematy:
boost topology
DC–DC converters
switched capacitor converter
Opis:
This elaboration presents the concept of a unidirectional DC–DC switchedcapacitor converter operating as a voltage tripler. The system consists of two resonant cells with switched capacitors and chokes. This proposed converter topology achieves low voltages on semiconductor switches (diodes and transistors) compared to the classic SC series-parallel converter or the boost topology. The output voltage on the capacitors is reduced in the proposed converter because it is divided into two series-connected capacitors with asymmetric distribution. The presented results describe the analytical description of the system operation and the analytical equation for semiconductor currents. A simulation and experimental results have been performed. The system efficiency and three voltage gain values were measured in the experimental setup. The efficiency measured was also compared with the analytical determination curve for loss analysis and further converter optimization.
Źródło:
Archives of Electrical Engineering; 2023, 72, 2; 373--389
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A multilevel switched capacitor DC-DC converter. An analysis of resonant operation conditions
Autorzy:
Kawa, A. H.
Stala, R.
Powiązania:
https://bibliotekanauki.pl/articles/1193251.pdf
Data publikacji:
2016
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
multilevel
DC-DC
switched capacitor
resonant
converter
boost
step-up
Opis:
This paper presents the research results of a multilevel switched capacitor DC-DC converter (MLSCC). The converter, for power electronic applications, can operate in ZCS mode by utilizing resonant circuits for recharging the switched capacitors. The main focus of this article is an in-depth original analysis of the waveforms and the converter voltage ratio. The concept of the converter is verified by simulation results of the circuit in MATLAB/Simulink Sim Power Systems. The formulas given in the mathematical analysis are evaluated for example parameters of the components with the use of numerical approach in MATLAB software. Plot sets are presented in order to judge the influence of the parameters on converter performance. All non-expected relations are explained based on mathematical analysis. The possibilities of the design optimization are identified and presented based on the anticipated results. The present analysis is important for the converter design process and can be used for numerical multi-object optimization to further improve the converter design.
Źródło:
Power Electronics and Drives; 2016, 1, 36/2; 35-53
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Performance study of a new high instantaneous power impulse converter with a switched capacitor unit
Autorzy:
Zając, L.
Malinowski, M.
Styński, S.
Jasiński, M.
Powiązania:
https://bibliotekanauki.pl/articles/1193281.pdf
Data publikacji:
2017
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
high instantaneous power impulse converter
impulse converter
switched capacitor converter
Opis:
A new high instantaneous power impulse converter (HIPIC) with a switched capacitor unit has been presented. HIPIC generates very short impulses (hundreds of microseconds) of instantaneous power in megawatt range while the average power is much lower (tens of kilowatts). The presented topology is composed of step-down converters, an H-bridge converter and a switched capacitor, adjusted with a new current control. It allows one to achieve the output current impulses with very short rising and falling times and strict peak current control with low ripples.
Źródło:
Power Electronics and Drives; 2017, 2, 37/1; 5-15
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A cost-effective resonant switched-capacitor DC-DC boost converter – experimental results and feasibility model
Autorzy:
Waradzyn, Z.
Stala, R.
Skała, A.
Mondzik, A.
Penczek, A.
Powiązania:
https://bibliotekanauki.pl/articles/1193543.pdf
Data publikacji:
2018
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
DC-DC converter
switched-capacitor
voltage multiplier
charge pump
ZCS
Opis:
This paper presents the results of experimental research of a resonant switched capacitor voltage multiplier in a cost-effective topology (CESCVM) with a limited number of active switches. In the charging mode of the switched capacitors, the converter utilizes only one active switch and a required number of diodes. Therefore, the cost of the converter is decreased as compared with that of a classical SCVM converter, owing to a lower number of switches and gate driver circuits, as well as a smaller PCB area. Moreover, the CESCVM has simpler control circuits and higher reliability. This paper presents the original experimental results of the operation of the CESCVM converter. A concept of the bootstrap supply of gate drivers of the flying switches is also examined.
Źródło:
Power Electronics and Drives; 2018, 3, 38; 75-83
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
DC–DC boost converter with high voltage gain and a low number of switches in multisection switched capacitor topology
Autorzy:
Stala, R.
Pirog, S.
Powiązania:
https://bibliotekanauki.pl/articles/141210.pdf
Data publikacji:
2018
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
DC–DC converter
boost converter
switched-capacitor
high voltage pulsed power
Opis:
This paper presents a concept and the results of an investigation of a DC–DC boost converter with high voltage gain and a reduced number of switches. The novel concept assumes that the converter operates in a topology composed of series connection switched- capacitor-based multiplier (SCVM) sections. Furthermore, the structure of the sections has significant impact on parameters of the converter which is discussed in this paper. The paper demonstrates the basic benefit such a multisection SCVM idea in the converter, which is the significant reduction in the number of switches and diodes for high voltage gain in comparison to an SCVM converter. Aside from the number of switches and diodes, such parameters as efficiency and volume of passive components in the multisection converter are analyzed in this paper. In figures, the analysis is demonstrated using the example of 100 kW thyristor-based converters. All the characteristics of the converter are compared between various configurations of switching cells in the particular sections, thus the paper can be useful for a design approach for a high voltage gain multicell converter.
Źródło:
Archives of Electrical Engineering; 2018, 67, 3; 617--627
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A New 13-Level Switched-Capacitor Inverter with Reduced Device Count
Autorzy:
Jena, Kasinath
Panigrahi, Chinmoy Kumar
Gupta, Krishna Kumar
Powiązania:
https://bibliotekanauki.pl/articles/1956000.pdf
Data publikacji:
2021
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
multilevel inverter
switched capacitor
voltage gain
component per level factor
cost function
Opis:
This paper proposed a new voltage-boosting 13-level switched-capacitor (SC) cost-effective inverter. The proposed topology comprises fourteen transistors, three capacitors and a single DC source to produce a 13-level staircase waveform. The capacitor voltage balancing problem is inherently solved by the series/parallel technique. Structural description, working principle, calculation of optimum values of capacitance and modulation scheme are briefly described. The comparative analyses with the existing SC multilevel inverter (MLI) in terms of voltage gain, blocking voltage, total standing voltage (TSV), component per level factor and cost function illustrate the merits of the proposed topology. Further, simulation and experimental results at different loading conditions verify the feasibility of the proposed topology.
Źródło:
Power Electronics and Drives; 2021, 6, 41; 26-41
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Single-source three-phase switched-capacitor-based MLI
Autorzy:
Jena, Kasinath
Gupta, Krishna Kumar
Bhatnagar, Pallavee
Jain, Sanjay K.
Stala, Robert
Waradzyn, Zbigniew
Piróg, Stanisław
Penczek, Adam
Mondzik, Andrzej
Skała, Aleksander
Powiązania:
https://bibliotekanauki.pl/articles/2175942.pdf
Data publikacji:
2022
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
multilevel inverter
switched capacitor
multicarrier pulse width modulation
cost function
ANPC inverter
Opis:
This article proposes a novel three-phase inverter based on the concept of switched capacitors (SCs), which uses a single DC source. A three-phase, seven-level line-to-line output voltage waveform is synthesised by the proposed topology, which includes eight switches, two capacitors, and one diode per phase leg. The proposed topology offers advantages in terms of inherent voltage gain, lower voltage stresses on power switches, and a reduced number of switching components. Additionally, the switched capacitors are self-balanced, thereby eliminating the need for a separate balancing circuit. The proposed structure and its operating principle, the self-balancing mechanism of the capacitors, and the control strategy are all thoroughly explained in the article. The proposed topology has also been compared with some recent SC topologies. Lastly, the proposed topology has been shown to be feasible through simulation and experimentation.
Źródło:
Power Electronics and Drives; 2022, 7, 42; 197--209
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Analog Reconfirable Circuits
Autorzy:
Malcher, A.
Falkowski, P.
Powiązania:
https://bibliotekanauki.pl/articles/226956.pdf
Data publikacji:
2014
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
analog signal processing
configurable analog block
CAB
dynamic reconfiguration
field programmable analog array
FPAA
switched capacitor circuits
Opis:
The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings of electronics, but the universal reconfigurable circuits called Field Programmable Analog Arrays (FPAA) have been developed over the last two decades. This paper presents the classification of analog circuit reconfiguration, examples of FPAA solutions obtained as academic projects and commercially available ones, as well as some application examples of the dynamic reconfiguration of FPAA.
Źródło:
International Journal of Electronics and Telecommunications; 2014, 60, 1; 15-26
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A solution to low power switched capacitor integrator design with reduced effective input capacitance
Autorzy:
Korkmaz, S.
Dundar, G.
Powiązania:
https://bibliotekanauki.pl/articles/398106.pdf
Data publikacji:
2010
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
integrator małej mocy
bardzo duża stała czasowa integratora
skuteczne zmniejszenie pojemności
włączony integrator kondensatora
low power integrator
very large time constant integrator
effective capacitance reduction
switched capacitor integrator
Opis:
A novel low power Switched Capacitor Integrator with reduced effective input capacitance is proposed in this paper. It is mainly based on reducing the effective input sampling capacitance by charge sharing with an extra capacitance, such that the integration capacitance can be chosen much smaller while maintaining the same sampling to integration capacitance ratio. Reducing the integration capacitance will result in less integration current and less integration current will in turn result in less power over the integrator which is the main goal of this work, reducing the integrator power consumption and chip area. Another main advantage of this configuration is, that it can be used in large time constant integrators without using physically large integration capacitance.
Źródło:
International Journal of Microelectronics and Computer Science; 2010, 1, 3; 229-235
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-10 z 10

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