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    Wyświetlanie 1-8 z 8
    Tytuł:
    Struktury algorytmiczne jednostek procesorowych do realizacji bazowych operacji dyskretnej transformaty falkowej
    Algorithmic structures of processing units for IDWT basic operations implementation
    Autorzy:
    Tariova, G.
    Tariov, A.
    Powiązania:
    https://bibliotekanauki.pl/articles/155660.pdf
    Data publikacji:
    2007
    Wydawca:
    Stowarzyszenie Inżynierów i Techników Mechaników Polskich
    Tematy:
    dyskretna transformata falkowa DWT
    szybkie algorytmy
    procesory DWT
    discrete wavelet transform
    fast algorithms
    DWT processors
    Opis:
    W pracy zostało przedstawione podejście do zoptymalizowanej organizacji struktur algorytmicznych jednostek obliczeniowych dla realizacji bazowych operacji FDWT/IDWT ze zredukowaną liczbą mnożeń (lub układów mnożących w przypadku implementacji sprzętowej). Podejście to pozwala zmniejszyć nakłady obliczeniowe, zapotrzebowanie na zasoby sprzętowe oraz stworzyć dogodne warunki do efektywnej realizacji metod falkowego przetwarzania danych w układzie reprogramowalnym.
    This paper is concerned with the novel algorithmic structures for the realization of FDWT and IDWT basic procedures with the reduced number of arithmetic operations. As to well-known approaches, the immediate implementation of the above procedures requires 2L multipliers both for the DWT and IDWT basic procedures plus 2(L-1) adders for DWT and L adders for IDWT. At the same time, proposed algorithms require only 11oL multipliers for the both procedures plus 2L-1 adders for FDWT and L+1 adders for IDWT basic procedures. The proposed structures can be successfully applied to accelerate calculations in the FPGA-based platforms as well as to enhance the efficiency of hardware in general.
    Źródło:
    Pomiary Automatyka Kontrola; 2007, R. 53, nr 7, 7; 101-103
    0032-4140
    Pojawia się w:
    Pomiary Automatyka Kontrola
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Metoda implementacji trójwymiarowej dyskretnej transformaty falkowej strumienia wideo w układach FPGA
    Implemention of 3D DWT of video stream in FPGA
    Autorzy:
    Pamuła, W.
    Powiązania:
    https://bibliotekanauki.pl/articles/156515.pdf
    Data publikacji:
    2012
    Wydawca:
    Stowarzyszenie Inżynierów i Techników Mechaników Polskich
    Tematy:
    trójwymiarowa dyskretna transformata falkowa
    FPGA
    detekcja ruchomych obiektów
    3D DWT (Discrete Wavelet Transform)
    detection of moving objects
    Opis:
    Współczynniki dyskretnej transformaty falkowej reprezentują własności przestrzenne otoczenia punktu, dla którego są wyliczane i wyliczane są na podstawie wartości z tego otoczenia. Rozmiar otoczenia zależy od poziomu dekompozycji i długości filtrów. Korzystając z tej własności zaproponowano metodę implementacji polegającą na potokowym przetwarzaniu wektorów wartości z otoczenia. Potok realizuje algorytm transformaty na zadanym poziomie dekompozycji. Brak jest iteracyjnego wyliczania kolejnych poziomów dekompozycji i następuje znaczna redukcja liczby wymian danych z pamięcią. Przedstawiony jest przykład z wykorzystaniem falki S(1, 1), użyteczny do wykorzystania w rozwiązaniach detektorów ruchomych obiektów np. w ruchu drogowym.
    The paper presents a method for implementation of 3D discrete wavelet transform in FPGA. The method is based on direct calculation of coefficients at the desired level of decomposition. The previous methods [5, 6, 7] use complex architectures with multilevel processing, mapping the lifting scheme or the convolution procedure. The direct calculation of coefficients is done using the set of neighbourhood data. This set is derivative of the level of decomposition and the number of vanishing moments of the used wavelet filters - Eq. (3). An example of implementing the S (1, 1) transform at the third level of decomposition is presented. The S transform coefficients are the weighted sums of 4x4x4 volumes of data (Eqs. (4), (5)). Fig. 2 shows the block diagram of the implementation. Data from the stream is stored in a buffer memory of the neighbourhood vectors. The addressing scheme, which is carried out by the addressing module, assures appropriate ordering of data in the vectors, in the memory. Further refinement consists in summing in place the consecutive values and thus replacing the neighbourhood data with sums of data that are used for calculating coefficients. This reduces significantly the vector size and streamlines calculations. The results of logic utilisation (Table 2) of different FPGA components for the implementation are presented. The designed 3D DWT component is incorporated in a moving object detecting device processing video from a road traffic camera. The method may be used for developing specialised hardware for compressing 3D data streams in a way compatible with the JPEG2000 standard.
    Źródło:
    Pomiary Automatyka Kontrola; 2012, R. 58, nr 7, 7; 632-634
    0032-4140
    Pojawia się w:
    Pomiary Automatyka Kontrola
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Fault detection in robots based on discrete wavelet transformation and eigenvalue of energy
    Autorzy:
    Ouarhlent, Saloua
    Terki, Nadjiba
    Hamiane, Madina
    Dahmani, Habiba
    Powiązania:
    https://bibliotekanauki.pl/articles/27313829.pdf
    Data publikacji:
    2023
    Wydawca:
    Polska Akademia Nauk. Polskie Towarzystwo Diagnostyki Technicznej PAN
    Tematy:
    2 DOF robot
    fault detection system
    discrete wavelet transform
    DWT
    energy eigen value
    robot
    dyskretna transformata falkowa
    DVT
    system wykrywania błędów
    Opis:
    This article addresses the problem of fault detection in robot manipulator systems. In the production field, online detection and prevention of unexpected robot stops avoids disruption to the entire manufacturing line. A number of researchers have proposed fault diagnosis architectures for electrical systems such as induction motor, DC motor, etc..., utilising the technique of discrete wavelet transform. The results obtained from the use of this technique in the field of diagnosis are very encouraging. Inspired by previous work, The objective of this paper is to present a methodology that enables accurate fault detection in the actuator of a two-degree of freedom robot arm to avoid system performance degradation. A partial reduction in joint torque constitutes the actuator fault, resulting in a deviation from the desired end-effector motion. The actuator fault detection is carried out by analysing the torques signals using the wavelet transform. The stored energy at each level of the transform contains information which can be used as a fault indicator. A Matlab/Simulink simulation of the manipulator robot demonstrates the effectiveness of the proposed technique.
    Źródło:
    Diagnostyka; 2023, 24, 4; art. no. 2023407
    1641-6414
    2449-5220
    Pojawia się w:
    Diagnostyka
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    High impedance fault detection in radial distribution network using discrete wavelet transform technique
    Autorzy:
    Suliman, Mohammed Yahya
    Alkhayyat, Mahmood Taha
    Powiązania:
    https://bibliotekanauki.pl/articles/1955195.pdf
    Data publikacji:
    2021
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    high impedance fault
    HIF
    multiresolution analysis
    MRA
    overcurrent relays
    discrete wavelet transform
    DWT
    uszkodzenie o wysokiej impedancji
    analiza wielorozdzielcza
    przekaźniki nadprądowe
    dyskretna transformata falkowa
    Opis:
    Detecting high impedance faults (HIFs) is one of the challenging issues for electrical engineers. This type of fault occurs often when one of the overhead conductors is downed and makes contact with the ground, causing a high-voltage conductor to be within the reach of personnel. As the wavelet transform (WT) technique is a powerful tool for transient analysis of fault signals and gives information both on the time domain and frequency domain, this technique has been considered for an unconventional fault like high impedance fault. This paper presents a new technique that utilizes the features of energy contents in detail coefficients (D4 and D5) from the extracted current signal using a discrete wavelet transform in the multiresolution analysis (MRA). The adaptive neurofuzzy inference system (ANFIS) is utilized as a machine learning technique to discriminate HIF from other transient phenomena such as capacitor or load switching, the new protection designed scheme is fully analyzed using MATLAB feeding practical fault data. Simulation studies reveal that the proposed protection is able to detect HIFs in a distribution network with high reliability and can successfully differentiate high impedance faults from other transients.
    Źródło:
    Archives of Electrical Engineering; 2021, 70, 4; 873-886
    1427-4221
    2300-2506
    Pojawia się w:
    Archives of Electrical Engineering
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Mechanical fault detection in rotating electrical machines using MCSA-FFT and MCSA-DWT techniques
    Autorzy:
    Bessous, N.
    Sbaa, S.
    Megherbi, A. C.
    Powiązania:
    https://bibliotekanauki.pl/articles/200283.pdf
    Data publikacji:
    2019
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    motor current signature analysis
    MCSA
    discrete wavelet transform
    DWT
    rolling element bearing faults
    rotor eccentricity
    stator current spectrum
    dyskretna transformata falkowa
    uszkodzenia łożysk tocznych
    widmo prądu stojana
    Opis:
    This paper presents mechanical fault detection in squirrel cage induction motors (SCIMs) by means of two recent techniques. More precisely, we have analyzed the rolling element bearing (REB) faults in SCIM. Rolling element bearing faults constitute a major problem among different faults which cause catastrophic damage to rotating machinery. Thus early detection of REB faults in SCIMs is of crucial importance. Vibration analysis is among the key concepts for mechanical vibrations of rotating electrical machines. Today, there is massive competition between researchers in the diagnosis field. They all have as their aim to replace the vibration analysis technique. Among them, stator current analysis has become one of the most important subjects in the fault detection field. Motor current signature analysis (MCSA) has become popular for detection and localization of numerous faults. It is generally based on fast Fourier transform (FFT) of the stator current signal. We have detailed the analysis by means of MCSA-FFT, which is based on the stator current spectrum. Another goal in this work is the use of the discrete wavelet transform (DWT) technique in order to detect REB faults. In addition, a new indicator based on the MCSA-DWT technique has been developed in this study. This new indicator has the advantage of expressing itself in the quantity and quality form. The acquisition data are presented and a comparative study is carried out between these recent techniques in order to ensure a final decision. The proposed subject is examined experimentally using a 3 kW squirrel cage induction motor test bed.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2019, 67, 3; 571-582
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Execution time prediction model for parallel GPU realizations of discrete transforms computation algorithms
    Autorzy:
    Puchala, Dariusz
    Stokfiszewski, Kamil
    Wieloch, Kamil
    Powiązania:
    https://bibliotekanauki.pl/articles/2173636.pdf
    Data publikacji:
    2022
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    graphics processing unit
    GPU
    execution time prediction model
    discrete wavelet transform
    DWT
    lattice structure
    convolution-based approach
    orthogonal transform
    orthogonal filter banks
    time effectiveness
    prediction accuracy
    procesor graficzny
    model przewidywania czasu wykonania
    dyskretna transformata falkowa
    struktura sieciowa
    podejście oparte na splotach
    przekształcenia ortogonalne
    ortogonalne banki filtrów
    efektywność czasowa
    dokładność przewidywania
    Opis:
    Parallel realizations of discrete transforms (DTs) computation algorithms (DTCAs) performed on graphics processing units (GPUs) play a significant role in many modern data processing methods utilized in numerous areas of human activity. In this paper the authors propose a novel execution time prediction model, which allows for accurate and rapid estimation of execution times of various kinds of structurally different DTCAs performed on GPUs of distinct architectures, without the necessity of conducting the actual experiments on physical hardware. The model can serve as a guide for the system analyst in making the optimal choice of the GPU hardware solution for a given computational task involving particular DT calculation, or can help in choosing the best appropriate parallel implementation of the selected DT, given the limitations imposed by available hardware. Restricting the model to exhaustively adhere only to the key common features of DTCAs enables the authors to significantly simplify its structure, leading consequently to its design as a hybrid, analytically–simulational method, exploiting jointly the main advantages of both of the mentioned techniques, namely: time-effectiveness and high prediction accuracy, while, at the same time, causing mutual elimination of the major weaknesses of both of the specified approaches within the proposed solution. The model is validated experimentally on two structurally different parallel methods of discrete wavelet transform (DWT) computation, i.e. the direct convolutionbased and lattice structure-based schemes, by comparing its prediction results with the actual measurements taken for 6 different graphics cards, representing a fairly broad spectrum of GPUs compute architectures. Experimental results reveal the overall average execution time and prediction accuracy of the model to be at a level of 97.2%, with global maximum prediction error of 14.5%, recorded throughout all the conducted experiments, maintaining at the same time high average evaluation speed of 3.5 ms for single simulation duration. The results facilitate inferring the model generality and possibility of extrapolation to other DTCAs and different GPU architectures, which along with the proposed model straightforwardness, time-effectiveness and ease of practical application, makes it, in the authors’ opinion, a very interesting alternative to the related existing solutions.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2022, 70, 1; art. no. e139393
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Execution time prediction model for parallel GPU realizations of discrete transforms computation algorithms
    Autorzy:
    Puchala, Dariusz
    Stokfiszewski, Kamil
    Wieloch, Kamil
    Powiązania:
    https://bibliotekanauki.pl/articles/2173537.pdf
    Data publikacji:
    2022
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    graphics processing unit
    GPU
    execution time prediction model
    discrete wavelet transform
    DWT
    lattice structure
    convolution-based approach
    orthogonal transform
    orthogonal filter banks
    time effectiveness
    prediction accuracy
    procesor graficzny
    model przewidywania czasu wykonania
    dyskretna transformata falkowa
    struktura sieciowa
    podejście oparte na splotach
    przekształcenia ortogonalne
    ortogonalne banki filtrów
    efektywność czasowa
    dokładność przewidywania
    Opis:
    Parallel realizations of discrete transforms (DTs) computation algorithms (DTCAs) performed on graphics processing units (GPUs) play a significant role in many modern data processing methods utilized in numerous areas of human activity. In this paper the authors propose a novel execution time prediction model, which allows for accurate and rapid estimation of execution times of various kinds of structurally different DTCAs performed on GPUs of distinct architectures, without the necessity of conducting the actual experiments on physical hardware. The model can serve as a guide for the system analyst in making the optimal choice of the GPU hardware solution for a given computational task involving particular DT calculation, or can help in choosing the best appropriate parallel implementation of the selected DT, given the limitations imposed by available hardware. Restricting the model to exhaustively adhere only to the key common features of DTCAs enables the authors to significantly simplify its structure, leading consequently to its design as a hybrid, analytically–simulational method, exploiting jointly the main advantages of both of the mentioned techniques, namely: time-effectiveness and high prediction accuracy, while, at the same time, causing mutual elimination of the major weaknesses of both of the specified approaches within the proposed solution. The model is validated experimentally on two structurally different parallel methods of discrete wavelet transform (DWT) computation, i.e. the direct convolutionbased and lattice structure-based schemes, by comparing its prediction results with the actual measurements taken for 6 different graphics cards, representing a fairly broad spectrum of GPUs compute architectures. Experimental results reveal the overall average execution time and prediction accuracy of the model to be at a level of 97.2%, with global maximum prediction error of 14.5%, recorded throughout all the conducted experiments, maintaining at the same time high average evaluation speed of 3.5 ms for single simulation duration. The results facilitate inferring the model generality and possibility of extrapolation to other DTCAs and different GPU architectures, which along with the proposed model straightforwardness, time-effectiveness and ease of practical application, makes it, in the authors’ opinion, a very interesting alternative to the related existing solutions.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2022, 70, 1; e139393, 1--30
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Execution time prediction model for parallel GPU realizations of discrete transforms computation algorithms
    Autorzy:
    Puchala, Dariusz
    Stokfiszewski, Kamil
    Wieloch, Kamil
    Powiązania:
    https://bibliotekanauki.pl/articles/2173635.pdf
    Data publikacji:
    2022
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    graphics processing unit
    GPU
    execution time prediction model
    discrete wavelet transform
    DWT
    lattice structure
    convolution-based approach
    orthogonal transform
    orthogonal filter banks
    time effectiveness
    prediction accuracy
    procesor graficzny
    model przewidywania czasu wykonania
    dyskretna transformata falkowa
    struktura sieciowa
    podejście oparte na splotach
    przekształcenia ortogonalne
    ortogonalne banki filtrów
    efektywność czasowa
    dokładność przewidywania
    Opis:
    Parallel realizations of discrete transforms (DTs) computation algorithms (DTCAs) performed on graphics processing units (GPUs) play a significant role in many modern data processing methods utilized in numerous areas of human activity. In this paper the authors propose a novel execution time prediction model, which allows for accurate and rapid estimation of execution times of various kinds of structurally different DTCAs performed on GPUs of distinct architectures, without the necessity of conducting the actual experiments on physical hardware. The model can serve as a guide for the system analyst in making the optimal choice of the GPU hardware solution for a given computational task involving particular DT calculation, or can help in choosing the best appropriate parallel implementation of the selected DT, given the limitations imposed by available hardware. Restricting the model to exhaustively adhere only to the key common features of DTCAs enables the authors to significantly simplify its structure, leading consequently to its design as a hybrid, analytically–simulational method, exploiting jointly the main advantages of both of the mentioned techniques, namely: time-effectiveness and high prediction accuracy, while, at the same time, causing mutual elimination of the major weaknesses of both of the specified approaches within the proposed solution. The model is validated experimentally on two structurally different parallel methods of discrete wavelet transform (DWT) computation, i.e. the direct convolutionbased and lattice structure-based schemes, by comparing its prediction results with the actual measurements taken for 6 different graphics cards, representing a fairly broad spectrum of GPUs compute architectures. Experimental results reveal the overall average execution time and prediction accuracy of the model to be at a level of 97.2%, with global maximum prediction error of 14.5%, recorded throughout all the conducted experiments, maintaining at the same time high average evaluation speed of 3.5 ms for single simulation duration. The results facilitate inferring the model generality and possibility of extrapolation to other DTCAs and different GPU architectures, which along with the proposed model straightforwardness, time-effectiveness and ease of practical application, makes it, in the authors’ opinion, a very interesting alternative to the related existing solutions.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2022, 70, 1; art. no. e139393
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-8 z 8

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