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    Wyświetlanie 1-14 z 14
    Tytuł:
    Kalman filter based method for fault diagnosis of analog circuits
    Autorzy:
    Li, X.
    Xie, Y.
    Bi, D.
    Ao, Y.
    Powiązania:
    https://bibliotekanauki.pl/articles/221517.pdf
    Data publikacji:
    2013
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog fault diagnosis
    signature extraction
    Kalman filter
    Shannon entropy
    Opis:
    This paper presents a Kalman filter based method for diagnosing both parametric and catastrophic faults in analog circuits. Two major innovations are presented, i.e., the Kalman filter based technique, which can significantly improve the efficiency of diagnosing a fault through an iterative structure, and the Shannon entropy to mitigate the influence of component tolerance. Both these concepts help to achieve higher performance and lower testing cost while maintaining the circuit.s functionality. Our simulations demonstrate that using the Kalman filter based technique leads to good results of fault detection and fault location of analog circuits. Meanwhile, the parasitics, as a result of enhancing accessibility by adding test points, are reduced to minimum, that is, the data used for diagnosis is directly obtained from the system primary output pins in our method. The simulations also show that decision boundaries among faulty circuits have small variations over a wide range of noise-immunity requirements. In addition, experimental results show that the proposed method is superior to the test method based on the subband decomposition combined with coherence function, arisen recently.
    Źródło:
    Metrology and Measurement Systems; 2013, 20, 2; 307-322
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Construction of an Expert System Based on Fuzzy Logic for Diagnosis of Analog Electronic Circuits
    Autorzy:
    Grzechca, D. E.
    Powiązania:
    https://bibliotekanauki.pl/articles/226616.pdf
    Data publikacji:
    2015
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits fault diagnosis
    analog system testing
    fuzzy set theory
    expert system
    sensitivity analysis
    Opis:
    The paper presents construction of the fuzzy logic system to analog circuits parametric fault diagnosis. The classical dictionary construction is replaced by fuzzy rule system. The first part refers to analog fault diagnosis, its techniques, approaches and goals. It clarifies common strategy and define differences between detecting, locating and identifying a fault in analog electronic circuit. The second part is focused on a creation of fuzzy rule expert system with use of sensitivity functions and known circuit topology. To detect, locate and identify a faulty element in a circuit the sensitivity matrix is used. The advantage of the method is its utilization in all, AC, DC and time domain. The fuzzy system, like the classical fault dictionary, can detect and locate single catastrophic faults and, on the contrary to the classical one, it also detects and locates parametric faults. Moreover, it allows identification of these faults, such that sign of the faulty parameter deviation is designated. The method has deterministic character as well as it can be applied on the verification and production stage.
    Źródło:
    International Journal of Electronics and Telecommunications; 2015, 61, 1; 77-82
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Identification of Circuit Parameters for the Specified or Measured Performances
    Autorzy:
    Rutkowski, J.
    Powiązania:
    https://bibliotekanauki.pl/articles/226920.pdf
    Data publikacji:
    2015
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits
    parameter identification
    fault diagnosis
    Opis:
    Extension of the method of analog circuit parameter identification for the specified design performances, originally presented by the same author in 1982, is described. These parameters are designated by means of PSpice simulation of the adjoint circuit to the original one. In this adjoint circuit, elements of the original circuit, described by the sized parameters, are replaced by controlled sources. Each such source is controlled by the differential voltage or current, difference between the calculated voltage or current and the specified one, with infinitely large gain. The method is applicable to both linear and nonlinear DC circuits and AC circuits and can be used in many fields of analog circuit design, such as: finding of acceptability region, analog fault diagnosis, postproduction identification and tuning. In the later cases, design performances are replaced by measurements of Circuit Under Test (CUT). Simplicity, extremely low computational complexity and high accuracy are the main benefits of the proposed, basic Circuit Theory based, approach - the solution is found after a single PSpice simulation. For better understanding of the presented methodology, five practical examples are discussed.
    Źródło:
    International Journal of Electronics and Telecommunications; 2015, 61, 1; 95-100
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    A method for Soft Fault Diagnosis of Linear Analog Circuits Using the Laplace Transform Technique
    Autorzy:
    Tadeusiewicz, Michał
    Ossowski, Marek
    Korzybski, Marek
    Powiązania:
    https://bibliotekanauki.pl/articles/1844533.pdf
    Data publikacji:
    2021
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog linear circuits
    fault diagnosis
    multiple soft fault
    Laplace transform
    Opis:
    This paper is focused on multiple soft fault diagnosis of linear time-invariant analog circuits and brings a method that achieves all objectives of the fault diagnosis: detection, location, and identification. The method is based on a diagnostic test arranged in the transient state, which requires one node accessible for excitation and two nodes accessible for measurement. The circuit is specified by two transmittances which express the Laplace transform of the output voltages in terms of the Laplace transform of the input voltage. Each of these relationships is used to create an overdetermined system of nonlinear algebraic equations with the circuit parameters as the unknown variables. An iterative method is developed to solve these equations. Some virtual solutions can be eliminated comparing the results obtained using both transmittances. Three examples are provided where laboratory or numerical experiments reveal effectiveness of the proposed method.
    Źródło:
    International Journal of Electronics and Telecommunications; 2021, 67, 3; 531-536
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Two heuristic alghorithms for test point selection in analog circuit diagnoses
    Autorzy:
    Pułka, A.
    Powiązania:
    https://bibliotekanauki.pl/articles/221005.pdf
    Data publikacji:
    2011
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuit diagnosis
    fault diagnosis
    testing
    search methods
    heuristic optimization
    Opis:
    The paper presents a heuristic approach to the problem of analog circuit diagnosis. Different optimization techniques in the field of test point selection are discussed. Two new algorithms: SALTO and COSMO have been introduced. Both searching procedures have been implemented in a form of the expert system in PROLOG language. The proposed methodologies have been exemplified on benchmark circuits. The obtained results have been compared to the others achieved by different approaches in the field and the benefits of the proposed methodology have been emphasized. The inference engine of the heuristic algorithms has been presented and the expert system knowledge-base construction discussed.
    Źródło:
    Metrology and Measurement Systems; 2011, 18, 1; 115-128
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Fault diagnosis of analog circuit based on wavelet transform and neural network
    Autorzy:
    Wang, Hui
    Powiązania:
    https://bibliotekanauki.pl/articles/141368.pdf
    Data publikacji:
    2020
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuit
    fault diagnosis
    neural network
    wavelet transform
    Opis:
    Analog circuits need more effective fault diagnosis methods. In this study, the fault diagnosis method of analog circuits was studied. The fault feature vectors were extracted by a wavelet transform and then classified by a generalized regression neural network (GRNN). In order to improve the classification performance, a wolf pack algorithm (WPA) was used to optimize the GRNN, and a WPA-GRNN diagnosis algorithm was obtained. Then a simulation experiment was carried out taking a Sallen–Key bandpass filter as an example. It was found from the experimental results that the WPA could achieve the preset accuracy in the eighth iteration and had a good optimization effect. In the comparison between the GRNN, genetic algorithm (GA)-GRNN and WPA-GRNN, the WPA-GRNN had the highest diagnostic accuracy, and moreover it had high accuracy in diagnosing a single fault than multiple faults, short training time, smaller error, and an average accuracy rate of 91%. The experimental results prove the effectiveness of the WPA-GRNN in fault diagnosis of analog circuits, which can make some contributions to the further development of the fault diagnosis of analog circuits.
    Źródło:
    Archives of Electrical Engineering; 2020, 69, 1; 175-185
    1427-4221
    2300-2506
    Pojawia się w:
    Archives of Electrical Engineering
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Multiple soft fault diagnosis of BJT circuits
    Autorzy:
    Tadeusiewicz, M.
    Hałgas, S.
    Powiązania:
    https://bibliotekanauki.pl/articles/221281.pdf
    Data publikacji:
    2014
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits
    BJT circuits
    fault diagnosis
    multiple faults
    Opis:
    This paper deals with multiple soft fault diagnosis of nonlinear analog circuits comprising bipolar transistors characterized by the Ebers-Moll model. Resistances of the circuit and beta forward factor of a transistor are considered as potentially faulty parameters. The proposed diagnostic method exploits a strongly nonlinear set of algebraic type equations, which may possess multiple solutions, and is capable of finding different sets of the parameters values which meet the diagnostic test. The equations are written on the basis of node analysis and include DC voltages measured at accessible nodes, as well as some measured currents. The unknown variables are node voltages and the parameters which are considered as potentially faulty. The number of these parameters is larger than the number of the accessible nodes. To solve the set of equations the block relaxation method is used with different assignments of the variables to the blocks. Next, the solutions are corrected using the Newton-Raphson algorithm. As a result, one or more sets of the parameters values which satisfy the diagnostic test are obtained. The proposed approach is illustrated with a numerical example.
    Źródło:
    Metrology and Measurement Systems; 2014, 21, 4; 663-674
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Multiple soft fault diagnosis of nonlinear dc circuits considering component tolerances
    Autorzy:
    Tadeusiewicz, M.
    Hałgas, S.
    Powiązania:
    https://bibliotekanauki.pl/articles/221771.pdf
    Data publikacji:
    2011
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits
    fault diagnosis
    multiple faults
    nonlinear circuits
    Opis:
    This paper is devoted to multiple soft fault diagnosis of analog nonlinear circuits. A two-stage algorithm is offered enabling us to locate the faulty circuit components and evaluate their values, considering the component tolerances. At first a preliminary diagnostic procedure is performed, under the assumption that the non-faulty components have nominal values, leading to approximate and tentative results. Then, they are corrected, taking into account the fact that the non-faulty components can assume arbitrary values within their tolerance ranges. This stage of the algorithm is carried out using the linear programming method. As a result some ranges are obtained including possible values of the faulty components. The proposed approach is illustrated with two numerical examples.
    Źródło:
    Metrology and Measurement Systems; 2011, 18, 3; 349-360
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    A Verification Technique for Multiple Soft Fault Diagnosis of Linear Analog Circuits
    Autorzy:
    Tadeusiewicz, M.
    Ossowski, M.
    Powiązania:
    https://bibliotekanauki.pl/articles/227002.pdf
    Data publikacji:
    2018
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits
    fault diagnosis
    linear circuits
    multiple soft fault
    verification technique
    Opis:
    The paper deals with multiple soft fault diagnosis of linear analog circuits. A fault verification method is developed that allows estimating the values of a set of the parameters considered as potentially faulty. The method exploits the transmittance of the circuit and is based on a diagnostic test leading to output signal in discrete form. Applying Z-transform a diagnostic equation is written which is next reproduced. The obtained system of equations consisting of larger number of equations than the number of the parameters is solved using appropriate numerical approach. The method is adapted to real circumstances taking into account scattering of the fault-free parameters within their tolerance ranges and some errors produced by the method. In consequence, the results provided by the method have the form of ranges including the values of the tested parameters. To illustrate the method two examples of real electronic circuits are given.
    Źródło:
    International Journal of Electronics and Telecommunications; 2018, 64, 1; 83-89
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    A novel method of handling tolerances for analog circuit fault diagnosis based on normal quotient distribution
    Autorzy:
    Ao, Y.
    Shi, Y.
    Zhang, W.
    Li, X.
    Powiązania:
    https://bibliotekanauki.pl/articles/221119.pdf
    Data publikacji:
    2012
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    soft-fault diagnosis
    analog circuit
    Normal Quotient Distribution
    Slope Fault Model
    Opis:
    While the Slope Fault Model method can solve the soft-fault diagnosis problem in linear analog circuit effectively, the challenging tolerance problem is still unsolved. In this paper, a proposed Normal Quotient Distribution approach was combined with the Slope Fault Model to handle the tolerances problem in soft-fault diagnosis for analog circuit. Firstly, the principle of the Slope Fault Model is presented, and the huge computation of traditional Slope Fault Characteristic set was reduced greatly by the elimination of superfluous features. Several typical tolerance handling methods on the ground of the Slope Fault Model were compared. Then, the approximating distribution function of the Slope Fault Characteristic was deduced and sufficient conditions were given to improve the approximation accuracy. The monotonous and continuous mapping between Normal Quotient Distribution and standard normal distribution was proved. Thus the estimation formulas about the ranges of the Slope Fault Characteristic were deduced. After that, a new test-nodes selection algorithm based on the reduced Slope Fault Characteristic ranges set was designed. Finally, two numerical experiments were done to illustrate the proposed approach and demonstrate its effectiveness.
    Źródło:
    Metrology and Measurement Systems; 2012, 19, 4; 817-830
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Diagnosis of Soft Spot Short Defects in Analog Circuits Considering the Thermal Behaviour of the Chip
    Autorzy:
    Tadeusiewicz, M.
    Hałgas, S.
    Powiązania:
    https://bibliotekanauki.pl/articles/221818.pdf
    Data publikacji:
    2016
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits
    fault diagnosis
    short spot defects
    thermal effects
    Opis:
    The paper deals with fault diagnosis of nonlinear analogue integrated circuits. Soft spot short defects are analysed taking into account variations of the circuit parameters due to physical imperfections as well as self-heating of the chip. A method enabling to detect, locate and estimate the value of a spot defect has been developed. For this purpose an appropriate objective function was minimized using an optimization procedure based on the Fibonacci method. The proposed approach exploits DC measurements in the test phase, performed at a limited number of accessible points. For illustration three numerical examples are given.
    Źródło:
    Metrology and Measurement Systems; 2016, 23, 2; 239-250
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    New Aspects of Fault Diagnosis of Nonlinear Analog Circuits
    Autorzy:
    Tadeusiewicz, M.
    Hałgas, S.
    Kuczyński, A.
    Powiązania:
    https://bibliotekanauki.pl/articles/226274.pdf
    Data publikacji:
    2015
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits
    fault diagnosis
    local and global diagnosis
    multiple soft fault
    nonlinear circuits
    single hard faults
    Opis:
    The paper is focused on nonlinear analog circuits, with the special attention paid to circuits comprising bipolar and MOS transistors manufactured in micrometer and submicrometer technology. The problem of fault diagnosis of this class of circuits is discussed, including locating faulty elements and evaluating their parameters. The paper deals with multiple parametric fault diagnosis using the simulation after test approach as well as detection and location of single catastrophic faults, using the simulation before test approach. The discussed methods are based on diagnostic test, leading to a system of nonlinear algebraic type equations, which are not given in explicit analytical form. An important and new aspect of the fault diagnosis is finding multiple solutions of the test equation, i.e. several sets of the parameters values that meet the test. Another new problems in this area are global fault diagnosis of technological parameters in CMOS circuits fabricated in submicrometer technology and testing the circuits having multiple DC operating points. To solve these problems several methods have been recently developed, which employ different concepts and mathematical tools of nonlinear analysis. In this paper they are sketched and illustrated. All the discussed methods are based on the homotopy (continuation) idea. It is shown that various versions of homotopy and combinations of the homotopy with some other mathematical algorithms lead to very powerful tools for fault diagnosis of nonlinear analog circuits. To trace the homotopy path which allows finding multiple solutions, the simplicial method, the restart method, the theory of linear complementarity problem and Lemke’s algorithm are employed. For illustration four numerical examples are given.
    Źródło:
    International Journal of Electronics and Telecommunications; 2015, 61, 1; 83-93
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    A Novel Approach To Diagnosis Of Analog Circuit Incipient Faults Based On KECA And OAO LSSVM
    Autorzy:
    Zhang, C.
    He, Y.
    Zuo, L.
    Wang, J.
    He, W.
    Powiązania:
    https://bibliotekanauki.pl/articles/221378.pdf
    Data publikacji:
    2015
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog circuits
    incipient fault diagnosis
    wavelet transform
    kernel entropy component analysis
    least squares support vector machine
    Opis:
    Correct incipient identification of an analog circuit fault is conducive to the health of the analog circuit, yet very difficult. In this paper, a novel approach to analog circuit incipient fault identification is presented. Time responses are acquired by sampling outputs of the circuits under test, and then the responses are decomposed by the wavelet transform in order to generate energy features. Afterwards, lower-dimensional features are produced through the kernel entropy component analysis as samples for training and testing a one-against-one least squares support vector machine. Simulations of the incipient fault diagnosis for a Sallen-Key band-pass filter and a two-stage four-op-amp bi-quad low-pass filter demonstrate the diagnosing procedure of the proposed approach, and also reveal that the proposed approach has higher diagnosis accuracy than the referenced methods.
    Źródło:
    Metrology and Measurement Systems; 2015, 22, 2; 251-262
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Diagnostyka analogowych filtrów wielosekcyjnych oparta na magistrali testującej IEEE1149.1
    A fault diagnosis of multi-section filters based on the IEEE1149.1 test bus
    Autorzy:
    Czaja, Z.
    Bartosiński, B.
    Powiązania:
    https://bibliotekanauki.pl/articles/152339.pdf
    Data publikacji:
    2014
    Wydawca:
    Stowarzyszenie Inżynierów i Techników Mechaników Polskich
    Tematy:
    magistrala IEEE1149.1
    diagnostyka uszkodzeń
    mikrokontroler
    układ analogowy
    IEEE1149.1 test bus
    microcontroller
    fault diagnosis
    analog circuit
    Opis:
    Przedstawiono nową koncepcję testera JTAG BIST do samo-testowania torów analogowych opartych na wielosekcyjnych filtrach wyższego rzędu w mieszanych sygnałowo mikrosystemach elektronicznych sterowanych mikrokontrolerami i wyposażonych w magistralę testującą IEEE1149.1 (JTAG). Bazuje ona na metodzie diagnostycznej opartej na przekształceniu transformującym próbki odpowiedzi czasowych kolejnych sekcji filtra pobudzonego impulsem prostokątnym na krzywe identyfikacyjne w przestrzeni pomiarowej. Metoda ta pozwala na detekcję i lokalizację pojedynczych uszkodzeń parametrycznych w pierwszej w kolejności uszkodzonej sekcji filtra.
    A new solution of the JTAG BIST for self-testing of analog parts based on multi-section higher-order filters in mixed-signal electronic microsystems controlled by microcontrollers and equipped with the IEEE1149.1 bus is presented. It is based on a fault diagnosis method based on transformation of voltage samples of the time responses of the next section of the filter on a square impulse into identification curves placed in a measurement space. The method can be used for fault detection and single soft fault localization of the first faulty section of the filter. Thanks to use of the proposed fault diagnosis method, there is no need for expanding the JTAG BIST by any additional components. It follows from the fact that the square pulse stimulating the tested circuit is set only at the input of the first section of the filter. The ADC SCANSTA476 samples two times the time responses at outputs of all sections. Thanks to this, the JTAG BIST needs only one pin of the BCT8244A, and up to 8 inputs pins connected to the analog multiplexer of the ADC of the SCANSTA476.
    Źródło:
    Pomiary Automatyka Kontrola; 2014, R. 60, nr 9, 9; 745-748
    0032-4140
    Pojawia się w:
    Pomiary Automatyka Kontrola
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-14 z 14

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