- Tytuł:
- Hardware-Efficient Structure of the Accelerating Module for Implementation of Convolutional Neural Network Basic Operation
- Autorzy:
-
Cariow, A.
Cariowa, G. - Powiązania:
- https://bibliotekanauki.pl/articles/114320.pdf
- Data publikacji:
- 2018
- Wydawca:
- Stowarzyszenie Inżynierów i Techników Mechaników Polskich
- Tematy:
-
convolution neural network
Winograd’s minimal filtering
algorithm
implementation complexity reduction
FPGA implementation - Opis:
- This paper presents a structural design of the hardware-efficient module for implementation of convolution neural network (CNN) basic operation with reduced implementation complexity. For this purpose we utilize some modification of the Winograd’s minimal filtering method as well as computation vectorization principles. This module calculate inner products of two consecutive segments of the original data sequence, formed by a sliding window of length 3, with the elements of a filter impulse response. The fully parallel structure of the module for calculating these two inner products, based on the implementation of a naïve method of calculation, requires 6 binary multipliers and 4 binary adders. The use of the Winograd’s minimal filtering method allows to construct a module structure that requires only 4 binary multipliers and 8 binary adders. Since a high-performance convolutional neural network can contain tens or even hundreds of such modules, such a reduction can have a significant effect.
- Źródło:
-
Measurement Automation Monitoring; 2018, 64, 2; 40-42
2450-2855 - Pojawia się w:
- Measurement Automation Monitoring
- Dostawca treści:
- Biblioteka Nauki
Artykuł