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Wyświetlanie 1-15 z 17
Tytuł:
Mesoscale modeling of fracture in cement and asphalt concrete
Autorzy:
Al-Jelawy, Haider M.
Al-Rumaithi, Ayad
Fadhil, Aqeel T.
Naji, Alaa J.
Powiązania:
https://bibliotekanauki.pl/articles/35540382.pdf
Data publikacji:
2021
Wydawca:
Szkoła Główna Gospodarstwa Wiejskiego w Warszawie. Wydawnictwo Szkoły Głównej Gospodarstwa Wiejskiego w Warszawie
Tematy:
mesoscale model
damage model
fracture energy
cement concrete
asphalt concrete
disk-shaped compact tension test
Opis:
In this paper, mesoscale modeling is performed to simulate and understand fracture behavior of two concrete composites: cement and asphalt concrete using disk-shaped compact tension (DCT) tests. Mesoscale models are used as alternative to macroscale models to obtain better realistic behavior of composite and heterogeneous materials such as cement and asphalt concrete. In mesoscale models, aggregate and matrix are represented as distinct materials and each material has its characteristic properties. Disk-shaped compact tension test is used to obtain tensile strength and fracture energy of materials. This test can be used as a better alternative to other tests such as three points bending tests because it is more convenient for both field and laboratory specimens in addition to its accurate results. Comparing the numerical results of the mesoscale models of cement and asphalt concrete specimens with experimental data shows that these models can predict the behavior of these composite materials very well as seen in the curves of load-crack mouth opening displacement (CMOD). Also, the mesoscale modeling highlights the variability of crack direction where it is dependent on the random distribution of aggregate.
Źródło:
Scientific Review Engineering and Environmental Sciences; 2021, 30, 3; 439-450
1732-9353
Pojawia się w:
Scientific Review Engineering and Environmental Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Modeling the characteristics of high-k HfO2-Ta2O5 capacitor in Verilog-A
Autorzy:
Angelov, G. V.
Powiązania:
https://bibliotekanauki.pl/articles/398142.pdf
Data publikacji:
2011
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
modelowanie elementów elektronicznych
model kompaktowy
symulacja obwodu
dielektryk bramkowy o wysokiej przenikalności elektrycznej
Verilog-A
Spectre
device modeling
compact models
circuit simulation
high-k gate dielectric
Opis:
A circuit simulation model of a MOS capacitor with high-k HfO2-Ta2O5 mixed layer is developed and coded in Verilog-A hardware description language. Model equations are based on the BSIM3v3 model core. Capacitance-voltage (C-V) and current-voltage (I-V) characteristics are simulated in Spectre circuit simulator within Cadence CAD system and validated against experimental measurements of the HfO2-Ta2O5 slack structure.
Źródło:
International Journal of Microelectronics and Computer Science; 2011, 2, 3; 105-112
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Surface Potential Modeling of a High-k HfO2-Ta2O5 Capacitor in Verilog-A
Autorzy:
Angelov, G. V.
Powiązania:
https://bibliotekanauki.pl/articles/397997.pdf
Data publikacji:
2012
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
modelowanie elementów elektronicznych
model kompaktowy
PSP
symulacja obwodu
dielektryk bramkowy o wysokiej przenikalności elektrycznej
Verilog-A
Spectre
device modeling
compact models
circuit simulation
high-k gate dielectric
Opis:
A compact model of a high-k HfO2-Ta2O5 mixed layer capacitor stack is developed in Matlab. Model equations are based on the surface potential PSP model. After fitting the C-V characteristics in Matlab the model is coded in Verilog-A hardware description language and it is implemented as external library in Spectre circuit simulator within Cadence CAD system. The results are validated against the experimental measurements of the HfO2-Ta2O5 stack structure.
Źródło:
International Journal of Microelectronics and Computer Science; 2012, 3, 3; 111-118
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Modelowanie konstrukcji mikrosilnika ze zwojem zwartym na podstawie analizy polowej
The modeling of micromotor construction with compact coil using field analysis
Autorzy:
Anuszczyk, J.
Błaszczyk, P.
Powiązania:
https://bibliotekanauki.pl/articles/2076344.pdf
Data publikacji:
2006
Wydawca:
Sieć Badawcza Łukasiewicz - Instytut Napędów i Maszyn Elektrycznych Komel
Tematy:
silnik indukcyjny
mikrosilniki
modelowanie
analiza polowa
Opis:
The analysis of magnetic circuit of shaded pole induction motor (SPM), for basic micro - motor type 925 powered 3W, was conducted. The magnetic shunt as well as number and location of the compact laps are the influencing on electromagnetic parameters SPM elements, making up the auxiliary starting winding of motor. It the row of field calculations was executed from utilization the software OPERA 2d for different constructions of magnetic circuit of motor, and the different number of laps (thirteen the computational models). The simplest construction, and the simultaneously cheapest solution are then magnetic shunt is executed as prolongation of stator poles from one compact lap on pole. The realization of shunt made from the same electrotechnical sheet, what the whole core of motor is profitable technologically, however to reach hard near this the satisfactory electromagnetic parameters. The base of comparison of parameters row studied models establish the optimum solution of magnetic circuit of motor, the largest value of flux density in air gap and also the largest starting moment of motor was obtained.
Źródło:
Maszyny Elektryczne: zeszyty problemowe; 2006, 75; 119-124
0239-3646
2084-5618
Pojawia się w:
Maszyny Elektryczne: zeszyty problemowe
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Verilog-A Compact Semiconductor Device Modelling and Circuit Macromodelling with the QucsStudio-ADMS "Turn-Key" Modelling System
Autorzy:
Brinson, M. E.
Margraf, M.
Powiązania:
https://bibliotekanauki.pl/articles/398029.pdf
Data publikacji:
2012
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
QucsStudio
ADMS
Verilog-A
modelowanie turn-key
compact device modelling
turn-key component modeling
Opis:
The Verilog-A "Analogue Device Model Synthesizer" (ADMS) has in recent years become an established modelling tool for GNU General Public License circuit simulator development. Qucs and ngspice are two examples of open source circuit simulators that employ ADMS for compact semiconductor model construction. This paper presents a "turn- key" compact device modelling and circuit macromodelling system based on ADMS and implemented in the QucsStudio circuit design, simulation and manufacturing environment. A core feature of the new system is a modelling procedure which does not require users to manually patch, by hand, circuit simulator C++ code. At the start of QucsStudio simulation the software automatically detects any changes in Verilog-A model code, re-compiling and dynamically linking the modified code to the body of the QucsStudio cod e. The inherent flexibility of the "turn-key" system encourage s rapid experimentation with analogue and RF compact device models and circuit macromodels. In this paper QucsStudio "turn-key" modelling is illustrated by the design of a single stage RF amplifier circuit and the Harmonic Balance large signal AC simulation of a 50 Ω RF diode switch.
Źródło:
International Journal of Microelectronics and Computer Science; 2012, 3, 1; 32-40
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Large-Signal RF Modeling with the EKV3 MOSFET Model
Autorzy:
Chalkiadaki, M. A.
Buchar, M.
Powiązania:
https://bibliotekanauki.pl/articles/308061.pdf
Data publikacji:
2010
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
compact model
EKV3 model
large-signal
load-pull
MOSFET model
radio frequency
Opis:
This paper presents a validation of the EKV3 MOSFET model under load-pull conditions with high input power at 5.8 GHz, as well as S-parameter measurements with low input power up to 20 GHz. The EKV3 model is able to represent coherently the large- and small-signal RF characteristics in advanced 90 nm CMOS technology. Multifinger devices with nominal drawn gate length of 70 nm are used.
Źródło:
Journal of Telecommunications and Information Technology; 2010, 1; 29-33
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Compact Modeling of the Performance of SB-CNTFET as a Function of Geometrical and Physical Parameters
Autorzy:
Diabi, A.
Hocini, A.
Powiązania:
https://bibliotekanauki.pl/articles/1401300.pdf
Data publikacji:
2015-04
Wydawca:
Polska Akademia Nauk. Instytut Fizyki PAN
Tematy:
85.35.Kt
85.30.Tv
Opis:
In this work, we study the effects of geometrical and physical parameters on the performances of SB-CNTFET using a compact model. The influences of the physical parameters (height of the Schottky barrier ($\Phi_{SB}$) capacity of oxide layer $(C_{INS})$ and geometrical parameter (nanotube diameter $(d_{CNT})$) on the static performance $(I_\text{ON}//I_\text{OFF})$ of SB-CNTFET have been investigated. We present a detailed analysis of the electrical performance of the SB-CNTFET or current-voltage characteristics$ (I_{D}=f(V_{DS})$ for different values of $V_{GS}$, and also the characteristics $(I_{D}=f(V_{GS}))$ for different values of $V_{DS}$. All these circuits are studied for a fixed value of $\Phi_{SB}=0.275 eV$.
Źródło:
Acta Physica Polonica A; 2015, 127, 4; 1124-1127
0587-4246
1898-794X
Pojawia się w:
Acta Physica Polonica A
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Realization of logic integrated circuits in VeSTIC process - design, fabrication, and characterization
Autorzy:
Domański, Krzysztof
Głuszko, Grzegorz
Sierakowski, Andrzej
Tomaszewski, Daniel
Szmigiel, Dariusz
Powiązania:
https://bibliotekanauki.pl/articles/397763.pdf
Data publikacji:
2018
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
VeSTIC
VeSFET
logic cell
logic integrated circuit
ring oscillator
parasitic element
oscillation frequency
compact modeling
komórka logiczna
logiczny układ scalony
generator pierścieniowy
częstotliwość oscylacji
kompaktowe modelowanie
Opis:
A design and manufacturing of test structures for characterization of logic integrated circuits in a VeSTIC process developed in ITE, are described. Two variants of the VeSTIC processs have been described. A role and sources of the process variability have been discussed. The VeSFET I-V characteristics, the logic cell static characteristics, and waveforms of the 53-stage ring oscillator are presented. Basic parameters of the VeSFETs have been determined. The role of the process variability and of the parasitic elements introduced by the conservative circuit design, e.g. wide conductive lines connecting the devices in the circuits, have been discussed. Based on the inverter layout and on the process specification, the parasitic elements of the inverter equivalent circuit have been extracted. The inverter propagation times, the ring oscillator frequency, and their dependence on the supply bias have been determined.
Źródło:
International Journal of Microelectronics and Computer Science; 2018, 9, 3; 123-132
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Verilog-A inductor compact model for the efficient simulation of Class-D VCOs
Autorzy:
Fino, M. H.
Powiązania:
https://bibliotekanauki.pl/articles/397955.pdf
Data publikacji:
2016
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
Verilog-A
RF modeling
tapered Inductor
Class D Oscillator
modelowanie RF
cewka indukcyjna
oscylator
Opis:
This paper presents the use of a Verilog-A compact model for integrated spiral inductors, for the simulation of Class-D CMOS oscillators. The model takes into consideration the geometric parameters characterizing the inductor layout, as well as the technological parameters. The accuracy of the model is checked against simulations with ASITIC simulator and limitations of the model are established. The model is integrated into Cadence environment, offering the designer the possibility to efficiently simulate radio frequency blocks considering the non-idealities of both the inductors and the transistors in nanometric technologies. The particular case for a class-D oscillator is illustrated.
Źródło:
International Journal of Microelectronics and Computer Science; 2016, 7, 3; 114-118
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Advanced compact modeling of the deep submicron technologies
Autorzy:
Grabiński, W.
Bucher, M.
Sallese, J.-M.
Krummenacher, F.
Powiązania:
https://bibliotekanauki.pl/articles/309312.pdf
Data publikacji:
2000
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
ultra deep submicron (UDSM) technology
compact modeling
EKV MOS transistor model
MOSFET
matching
low power
RF applications
Opis:
The technology of CMOS large-scale integrated circuits (LSI's) achieved remarkable advances over last 25 year and the progress is expected to continue well into the next century. The progress has been driven by the downsizing of the active devices such as MOSFETs. Approaching these dimensions, MOSFET characteristics cannot be accurately predicted using classical modeling methods currently used in the most common MOSFET models such as BSIM, MM9 etc, without introducing large number of empirical parameters. Various physical effects that needed to be considered while modeling UDSM devices: quantization of the inversion layer, mobility degradation, carrier velocity saturation and overshoot, polydepletion effects, bias dependent source/drain resistances and capacitances, vertical and lateral doping profiles, etc. In this paper, we will discuss the progress in the CMOS technology and the anticipated difficulties of the sub-0.25 žm LSI downsizing. Subsequently, basic MOSFET modeling methodologies that are more appropriate for UDSM MOSFETs will be presented as well. The advances in compact MOSFET devices will be illustrated using application examples of the EPFL EKV model
Źródło:
Journal of Telecommunications and Information Technology; 2000, 3-4; 31-42
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Compact modeling of low-power and RF analogue MOSFET devices
Autorzy:
Grabiński, W.
Powiązania:
https://bibliotekanauki.pl/articles/378393.pdf
Data publikacji:
2003
Wydawca:
Sieć Badawcza Łukasiewicz - Instytut Technologii Elektronowej
Opis:
The technology of CMOS very large-scale integrated circuits (VLSI's) achieved remarkable advances over the last 25 years and the progress is expected to continue well into this century. The progress has been driven by the downsizing of the key devices: MOSFETs. Approaching these dimensions, MOSFET characteristics cannot be accurately predicted using classical modeling methods currently used in the most common MOSFET models such as BSIM3/4, EKV v2.6, HiMOS, MOS9 etc., without introducing large number of empirical parameters. Various physical effects that are needed to be considered while modeling UDSM devices: quantization of the inversion layer, mobility degradation, carrier velocity saturation and overshoot, polydepletion effects, bias dependent source/drain resistances and capacitances, vertical and lateral doping profiles, etc. In this paper, we will discuss the progress in CMOS technology and anticipated difficulties of the sub-O.25 um VLSI downsizing. Subsequently, basic MOSFET modeling methodologies that are more appropriate for low power and RF analogue applications of UDSM MOSFETs will be presented as well.
Źródło:
Electron Technology : Internet Journal; 2003, 35, 2; 1-7
1897-2381
Pojawia się w:
Electron Technology : Internet Journal
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Area equivalent WKB Compact modeling approach for tunneling probability in Hetero-Junction TFETs including ambipolar behaviour
Autorzy:
Horst, Fabian
Farokhnejad, Atieh
Darbandy, Ghader
Iñíguez, Benjamín
Kloes, Alexander
Powiązania:
https://bibliotekanauki.pl/articles/397787.pdf
Data publikacji:
2018
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
TFET
tunneling probability
WKB approximation
heterojunction
compact modeling
closed-form
double-gate
DG
ambipolarity
modelowanie kompaktowe
dwubiegunowość
Opis:
This paper introduces an innovative modeling approach for calculating the band-to-band (B2B) tunneling probability in tunnel-field effect transistors (TFETs). The field of application is the usage in TFET compact models. Looking at a tunneling process in TFETs, carriers try to tunnel through an energy barrier which is defined by the device band diagram. The tunneling energy barrier is approximated by an approach which assumes an area equivalent (AE) triangular shaped energy profile. The simplified energy triangle is suitable to be used in the Wentzel-Kramers-Brillouin (WKB) approximation. Referring to the area instead of the electric field at individual points is shown to be a more robust approach in terms of numerical stability. The derived AE approach is implemented in an existing compact model for double-gate (DG) TFETs. In order to verify and show the numerical stability of this approach, modeling results are compared to TCAD Sentaurus simulation data for various sets of device parameters, whereby the simulations include both ON- and AMBIPOLAR-state of the TFET. In addition to the various device dimensions, the source material is also changed to demonstrate the feasibility of simulating hetero-junctions. Comparing the modeling approach with TCAD data shows a good match. Apart the limitations demonstrated and discussed in this paper, the main advantage of the AE approach is the simplicity and a better fit to TCAD data in comparison to the quasi-2D WKB approach.
Źródło:
International Journal of Microelectronics and Computer Science; 2018, 9, 2; 47-59
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Compact device modeling using Verilog-AMS and ADMS
Autorzy:
Lemaitre, L.
Grabiński, W.
McAndrew, C.
Powiązania:
https://bibliotekanauki.pl/articles/378395.pdf
Data publikacji:
2003
Wydawca:
Sieć Badawcza Łukasiewicz - Instytut Technologii Elektronowej
Opis:
This paper shows how high level language such as Verilog-AMS can serve as support for compact modeling development of new devices. First section gives a fulI Verilog-AMS code of a simplified bipolar transistor. Each part of the code is carefulIy examined and explained. Second section compares different implementations of the simplified bipolar transistor in different spice simulators. ADMS, an open-source tool developed at Motorola, performs the implementation from Verilog-AMS to simulators. Third section concludes the paper by describing the implementation of the EKV model into ADS using the compact model interface provided by Agilent.
Źródło:
Electron Technology : Internet Journal; 2003, 35, 3; 1-5
1897-2381
Pojawia się w:
Electron Technology : Internet Journal
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Relativistic modeling of compact stars for charged anisotropic matter in a Tolman IV spacetime
Autorzy:
Malaver, Manuel
Powiązania:
https://bibliotekanauki.pl/articles/1178336.pdf
Data publikacji:
2017
Wydawca:
Przedsiębiorstwo Wydawnictw Naukowych Darwin / Scientific Publishing House DARWIN
Tematy:
Charged anisotropic matter
Relativistic objects
Tolman IV potential
electromagnetic field
lineal equation of state
Opis:
In this paper, we studied the behavior of relativistic objects considering Tolman IV form for the gravitational potential Z and a lineal equation of state within the framework of MIT-Bag model for the charged anisotropic matter. A physical analysis of electromagnetic field indicates that is regular in the origin and well behaved. The new obtained solution not admits singularities in the matter, charge density and metric functions. A graphical analysis indicates that the new stellar model satisfy all physical properties expected in a realistic star.
Źródło:
World Scientific News; 2017, 81, 2; 257-267
2392-2192
Pojawia się w:
World Scientific News
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Compact Modeling for Submicron Fully Depleted SOI MOSFETs
Autorzy:
Remmouche, R.
Boutaoui, N.
Bouridah, H.
Powiązania:
https://bibliotekanauki.pl/articles/1491285.pdf
Data publikacji:
2012-01
Wydawca:
Polska Akademia Nauk. Instytut Fizyki PAN
Tematy:
73.40.Qv
85.30.Tv
85.40.Bh
Opis:
In this paper, we have developed a novel compact charge-conservative model for fully depleted silicon-on-insulator MOSFETs and implemented it in SPICE3. Our model is valid for the DC, small-signal and large-signal simulations over a wide range of temperature. Simulations made using the model, following parameter extraction, are validated by comparison with experimental data.
Źródło:
Acta Physica Polonica A; 2012, 121, 1; 190-192
0587-4246
1898-794X
Pojawia się w:
Acta Physica Polonica A
Dostawca treści:
Biblioteka Nauki
Artykuł
Wyświetlanie 1-15 z 17

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