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Tytuł:
Low-Power High-Speed Double Gate 1-bit Full Adder Cell
Autorzy:
Kumar, R.
Roy, S.
Bhunia, C. T.
Powiązania:
https://bibliotekanauki.pl/articles/226653.pdf
Data publikacji:
2016
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
low-power full-adder
low-power CMOS design
multiplexer based full-adder design
multi-threshold voltage based full-adder design
pass transmission logic
Opis:
In this paper, we proposed an efficient full adder circuit using 16 transistors. The proposed high-speed adder circuit is able to operate at very low voltage and maintain the proper output voltage swing and also balance the power consumption and speed. Proposed design is based on CMOS mixed threshold voltage logic (MTVL) and implemented in 180nm CMOS technology. In the proposed technique the most time-consuming and power consuming XOR gates and multiplexer are designed using MTVL scheme. The maximum average power consumed by the proposed circuit is 6.94μW at 1.8V supply voltage and frequency of 500 MHz, which is less than other conventional methods. Power, delay, and area are optimized by using pass transistor logic and verified using the SPICE simulation tool at desired broad frequency range. It is also observed that the proposed design may be successfully utilized in many cases, especially whenever the lowest power consumption and delay are aimed.
Źródło:
International Journal of Electronics and Telecommunications; 2016, 62, 4; 329-334
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Comparative study on transistor based full adder designs
Autorzy:
Anitha, R.
Powiązania:
https://bibliotekanauki.pl/articles/1182905.pdf
Data publikacji:
2016
Wydawca:
Przedsiębiorstwo Wydawnictw Naukowych Darwin / Scientific Publishing House DARWIN
Tematy:
Full Adder; CPL; DPL; CMOS; Transmission gates; Arithmetic Unit
Opis:
Recently in the generic systems the load on the processor is much heavy. The ability and the challenging process have ended with larger core operations are in the core processor. This paper is basically given special importance on different methodologies having been proposed for Adder, which is the basic operation of the Arithmetic unit. The wide research on the digital adders has been covered so many applications like designs of ALU, RISC, CISC processors, DSP used for data path arithmetic, low power CMOS, optical computing, Nanotechnology and so on. This paper gives greater knowledge and understanding about the various techniques that have amply used of Adder from the earlier years. In this paper we analyzed the implementation of different types of full Adders implemented using CMOS logic (Static CMOS and Dynamic CMOS), CMOS Transmission Gates, Pass Transistor Gates (CPL and DPL).
Źródło:
World Scientific News; 2016, 53, 3; 404-416
2392-2192
Pojawia się w:
World Scientific News
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
All-optical ultrafast switching in a silicon microring resonator and its application to design multiplexer/demultiplexer, adder/subtractor and comparator circuit
Autorzy:
Rakshit, J. K.
Roy, J. N.
Powiązania:
https://bibliotekanauki.pl/articles/173324.pdf
Data publikacji:
2016
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
microring resonator
all-optical signal processing
optical logic gate
demultiplexer
optical multiplexing
adder subtractor
Opis:
In this paper, the possibility of using a silicon waveguide based microring resonator as a nonlinear all-optical switch is described under low power operation through a two-photon absorption effect. All-optical multiplexer/demultiplexer scheme based on two cascaded microring resonators has been proposed and described. The proposed circuits require smaller number of ring resonators and a single circuit consisting of two microring resonators capable to perform both multiplexer/demultiplexer operations by simply interchanging the inputs and outputs. Two optical pump signals represented the two operands of the logical operations to modulate the two microring resonators. The demultiplexer circuit can also perform as a half-adder/subtractor and a single bit data comparator. Numerical simulation results confirming described methods are given in this paper. The performances of the schemes are analyzed by calculating the extinction ratio, contrast ratio and amplitude modulation of the resulting data streams.
Źródło:
Optica Applicata; 2016, 46, 4; 517-539
0078-5466
1899-7015
Pojawia się w:
Optica Applicata
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
New self-checking booth multipliers
Autorzy:
Hunger, M.
Marienfeld, D.
Powiązania:
https://bibliotekanauki.pl/articles/907920.pdf
Data publikacji:
2008
Wydawca:
Uniwersytet Zielonogórski. Oficyna Wydawnicza
Tematy:
mnożnik Booth'a
samokontrola działania
przewidywanie parzystości
Booth multiplier
self-checking
parity-prediction
carry-dependent adder
1-out-of-5 code
Opis:
This work presents the first self-checking Booth-3 multiplier and a new self-checking Booth-2 multiplier using parity prediction. We propose a method which combines error-detection of Booth-3 (or Booth-2) decoder cells and parity prediction. Additionally, code disjointness is ensured by reusing logic for partial product generation. Parity prediction is applied to a carry-save-adder with the standard sign-bit extension. In this adder almost all cells have odd fanouts and faults are detected by the parity. Only one adder cell has an even fanout in the case of Booth-3 multiplication. Especially, for even-number Booth-2 multipliers parity prediction becomes efficient. Since that prediction slightly differs from previous work which describes CSA-folded adders, formulas to predict the parity are developed here. The proposed multipliers are compared experimentally with existing solutions. Only 102% of the area of Booth-2 without error detection is needed for the self-checking Booth-3 multiplier.
Źródło:
International Journal of Applied Mathematics and Computer Science; 2008, 18, 3; 319-328
1641-876X
2083-8492
Pojawia się w:
International Journal of Applied Mathematics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An Efficient Two-phase Clocked Sequential Multiply -Accumulator Unit for Image Blurring
Autorzy:
Samanth, Rashmi
Nayak, Subramanya G.
Powiązania:
https://bibliotekanauki.pl/articles/2055255.pdf
Data publikacji:
2022
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
multiply-accumulator (MAC) unit
modified sequential multiplier
finite state machine (FSM)
two-phase clockin
carry-save adder (CSA)
image blurring
Opis:
The multiply-accumulator (MAC) unit is the basic integral computational block in every digital image and digital signal processor. As the demand grows, it is essential to design these units in an efficient manner to build a successful processor. By considering this into account, a power-efficient, high-speed MAC unit is presented in this paper. The proposed MAC unit is a combination of a two-phase clocked modified sequential multiplier and a carry-save adder (CSA) followed by an accumulator register. A novel two-phase clocked modified sequential multiplier is introduced in the multiplication stage to reduce the power and computation time. For image blurring, these multiplier and adder blocks are subsequently incorporated into the MAC unit. The experimental results demonstrated that the proposed design reduced the power consumption by % and improved the computation time by % than the conventional architectures. The developed MAC unit is implemented using standard CMOS technology using CADENCE RTL compiler, synthesized using XILINX ISE and the image blurring effect is analyzed using MATLAB.
Źródło:
International Journal of Electronics and Telecommunications; 2022, 68, 2; 307--313
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Zmija zygzakowata Vipera berus ofiara zaby trawnej Rana temporaria
Adder Vipera berus as a prey of common frog Rana temporaria
Autorzy:
Ciach, M
Powiązania:
https://bibliotekanauki.pl/articles/33176.pdf
Data publikacji:
2007
Wydawca:
Mazowiecko-Świętokrzyskie Towarzystwo Ornitologiczne
Tematy:
plazy
zaba trawna
Rana temporaria
zdobywanie pokarmu
zmija zygzakowata
Vipera berus
rezerwat Przelom Bialki
obserwacje zwierzat
Źródło:
Kulon; 2007, 12; 103-104
1427-3098
Pojawia się w:
Kulon
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A Review on Performances of Reversible Ripple-Carry Adders
Autorzy:
Burignat, S.
De Vos, A.
Powiązania:
https://bibliotekanauki.pl/articles/227089.pdf
Data publikacji:
2012
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
reversible computation
design
implementation
pass-transistor logic
ripple-carry adder
sum-difference block
Spectre simulation
quantum computation
adiabatic signal
test and measurement
error propagation
Opis:
Quantum computing and circuits are of growing interest and so is reversible logic as it plays an important role in the synthesis of quantum circuits. Moreover, reversible logic provides an alternative to classical computing machines, that may overcome many of the power dissipation problems in the near future. Some ripple-carry adders based on a do-spy-undo structure have been designed and tested reversibly. This paper presents a brief overview of the performances obtained with such chips processed in standard 0.35 um CMOS technology and used in true reversible calculation (computations are performed forwards and backwards such that addition and subtraction are made reversibly with the same chip). Adiabatic signals used are known to allow the signal energy stored on the various capacitances of the circuit to be redistributed rather than being dissipated as heat while allowing to avoid calculation errors introduced by the use of conventional rectangular pulses. Through the example of both simulations and experimental results, this paper aims at providing a base of knowledge and knowhow in physical implementation of reversible circuits.
Źródło:
International Journal of Electronics and Telecommunications; 2012, 58, 3; 205-212
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Demographic responses of boreal-montane orchid Malaxis monophyllos (L.) Sw. populations to contrasting environmental conditions
Autorzy:
Jermakowicz, E.
Brzosko, E.
Powiązania:
https://bibliotekanauki.pl/articles/58627.pdf
Data publikacji:
2016
Wydawca:
Polskie Towarzystwo Botaniczne
Tematy:
demographic response
orchid
white adder's mouth
Malaxis monophyllos
plant population
environment condition
population dynamics
red list
plant species
anthropogenic habitat
Opis:
In an age of changes in species’ geographical ranges, compounded by climatic and anthropogenic impacts, it become important to know which processes and factors influence plant populations and their persistence in the long term. Here we investigated dynamic and fitness components in twelve populations of Malaxis monophyllos (L.) Sw., situated in different geographical (regions) and ecological (type of habitat) units. Although M. monophyllos is a rare species, characterized by highly fragmented, boreal-montane distribution range, in last few decades it successfully colonized secondary habitats in Polish uplands. Our results indicate that M. monophyllos is represented mainly by small populations, which annual spatial and temporal changes might be very high, what affects the ephemeral character of these populations, regardless of the region and type of habitat. This dynamic structure, in turn, is caused by intensive exchange of individuals in populations, as well as by their short above-ground life span. Despite the large range of variation in size and reproductive traits, we can distinguish some regional patterns, which indicate boreal region as the most optimal for M. monophyllos growth and persistence in the long term, and with montane and upland/anthropogenic populations, due to lower reproductive parameters, as the most threatened. Although it should be considered that anthropogenic populations, despite their lower reproductive parameters and instability in the long term, present an intermediate, geographical and ecological character, therefore they may be valuable in shaping, both M. monophyllos’ future range, as well as its potential for response on ongoing and future changes. In general, reproduction is the main factor differentiating of M. monophyllos populations in regions, and we can suspect that it may become the cause of the future differentiation and isolation of these populations, occurring with progressive range fragmentation.
Źródło:
Acta Societatis Botanicorum Poloniae; 2016, 85, 1
0001-6977
2083-9480
Pojawia się w:
Acta Societatis Botanicorum Poloniae
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Four-channel multiplexer on surface plasmon polaritons development and research
Autorzy:
Nevinskyі, D. V.
Zakalyk, L. I.
Lebid, S. Y.
Korzh, H. I.
Pavlysh, V. A.
Powiązania:
https://bibliotekanauki.pl/articles/115672.pdf
Data publikacji:
2016
Wydawca:
Fundacja na Rzecz Młodych Naukowców
Tematy:
surface plasmon polariton
splitter
adder
model
lithography
channel
multiplexer
SPP
rozdzielacz
sumatory
litografia
kanał
multiplekser
Opis:
Simulation of the surface plasmon polariton (SPP) distribution in the 10 μm long four-channel multiplexer is conducted in present paper. The excitation of the SPP was done using the 632.8 nm pulse laser with 50 fs pulse duration. The simulation processes of the SPP propagation in the fourchannel multiplexer were performed for the latter switched as a splitter as an adder. Though the obtained signal strength is low due to ohmic losses and signal reflections in the middle of the waveguide it is possible to registrate it. The detailed procedure of waveguides preparation, analysis and registration of SPP propagation is described in the paper. For the proposed model verification the two-channel 20 μm long splitter was formed by optical projection lithography. Studies have shown that the SPP is distributed throughout the whole structure of the 20 μm long two-channel splitter with a partial extinction due to ohmic losses.
Źródło:
Challenges of Modern Technology; 2016, 7, 1; 7-11
2082-2863
2353-4419
Pojawia się w:
Challenges of Modern Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Zmienne preferencje siedliskowe żmii zygzakowatej Vipera berus obserwowane w województwie mazowieckim i lubelskim
Variable habitat preferences of the common European adder Vipera berus observed in the provinces of Mazovia and Lublin (Poland)
Autorzy:
Kosmider, J.
Nawrocka, M.
Jobda, M.
Jasinska, K.
Powiązania:
https://bibliotekanauki.pl/articles/881070.pdf
Data publikacji:
2013
Wydawca:
Szkoła Główna Gospodarstwa Wiejskiego w Warszawie. Leśny Zakład Doświadczalny. Centrum Edukacji Przyrodniczo-Leśnej w Rogowie
Tematy:
weze
zmija zygzakowata
Vipera berus
wystepowanie
preferencje siedliskowe
woj.mazowieckie
woj.lubelskie
Źródło:
Studia i Materiały Centrum Edukacji Przyrodniczo-Leśnej; 2013, 15, 3[36]
1509-1414
Pojawia się w:
Studia i Materiały Centrum Edukacji Przyrodniczo-Leśnej
Dostawca treści:
Biblioteka Nauki
Artykuł
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