Temat: technology characterization - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Piezoresistive sensors for atomic force microscopy - numerical simulations by means of virtual wafer fab
Autorzy:: Dębski, T.
Barth, W.
Rangelow, I.W.
Domański, K.
Tomaszewski, D.
Grabiec, P.
Jakubowski, A.
Powiązania:: https://bibliotekanauki.pl/articles/307644.pdf
Data publikacji:: 2001
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: atomic force microscopy (AFM)
piezoresistive sensors
technology simulation
technology characterization
Opis:: An important element in microelectronics is the comparison of the modelling and measurements results of the real semiconductor devices. Our paper describes the final results of numerical simulation of a micromechanical process sequence of the atomic force microscopy (AFM) sensors. They were obtained using the virtual wafer fab (VWF) software, which is used in the Institute of Electron Technology (IET). The technology mentioned above is used for fabrication of the AFM cantilevers, which has been designed for measurement and characterization of the surface roughness, the texturing, the grain size and the hardness. The simulation are very useful in manufacturing other microcantilever sensors.
Źródło:: Journal of Telecommunications and Information Technology; 2001, 1; 35-39
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Characterization of SOI fabrication process using gated-diode measurements and TEM studies
Autorzy:: Gibki, J.
Kątcki, J.
Ratajczak, J.
Łukasik, L.
Jakubowski, A.
Tomaszewski, D.
Powiązania:: https://bibliotekanauki.pl/articles/309219.pdf
Data publikacji:: 2000
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: microelectronics
SOI technology
characterization
Opis:: SOI fabrication process was characterized using electrical and TEM methods. The investigated SOI structures included partially and fully depleted capacitors, gated diodes and transistors fabricated on SIMOX substrates. From C-V and I-V measurements of gated diodes, the following parameters of partially depleted structures were determined: doping concentration in both n- and p-type regions, average carrier generation lifetimes in the region under the gate and generation velocity at top and bottom surfaces of the active layer. Structures with short lifetime were studied using a transmission electron microscope. TEM studies indicate that the quality of the active layer in the investigated structures is good. Moreover, these studies were used to verify the thicknesses determined by means of electrical characterization methods.
Źródło:: Journal of Telecommunications and Information Technology; 2000, 3-4; 81-83
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

Artykuł

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