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Wyświetlanie 1-15 z 27
Tytuł:
Generalized space vector control for current source inverters and rectifiers
Autorzy:
Anitha Roseline, J.
Senthil Kumaran, M.
Rajini, V.
Powiązania:
https://bibliotekanauki.pl/articles/140525.pdf
Data publikacji:
2016
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
current source rectifiers (CSR)
current source inverters (CSI)
current source multilevel inverter (CSMLI)
space vector pulse width modulation (SVPWM)
Opis:
Current source inverters (CSI) is one of the widely used converter topology in medium voltage drive applications due to its simplicity, motor friendly waveforms and reliable short circuit protection. The current source inverters are usually fed by controlled current source rectifiers (CSR) with a large inductor to provide a constant supply current. A generalized control applicable for both CSI and CSR and their extension namely current source multilevel inverters (CSMLI) are dealt in this paper. As space vector pulse width modulation (SVPWM) features the advantages of flexible control, faster dynamic response, better DC utilization and easy digital implementation it is considered for this work. This paper generalizes SVPWM that could be applied for CSI, CSR and CSMLI. The intense computation involved in framing a generalized space vector control are discussed in detail. The algorithm includes determination of band, region, subregions and vectors. The algorithm is validated by simulation using MATLAB /SIMULINK for CSR 5, 7, 13 level CSMLI and for CSR fed CSI.
Źródło:
Archives of Electrical Engineering; 2016, 65, 2; 235-248
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Implementation of PID on PIC24F series microcontroller for speed control of a DC motor using MPLAB and Proteus
Autorzy:
Aslam, S.
Hannan, S.
Sajjad, U.
Zafar, W.
Powiązania:
https://bibliotekanauki.pl/articles/102984.pdf
Data publikacji:
2016
Wydawca:
Stowarzyszenie Inżynierów i Techników Mechaników Polskich
Tematy:
proportional integral derivative controller
pulse width modulation (PWM)
linear quadratic regulator
peripheral interface controller
MPLAB
proteus
duty cycle
Opis:
Speed control of a DC motor is critical in most industrial systems where accuracy and protection are of essence. This paper presents simulations of Proportional Integral Derivative Controller (PID) on a 16-bit PIC 24F series microcontroller for speed control of a DC motor in the presence of load torque. The PID gains have been tuned by Linear Quadratic Regulator (LQR) technique and then it is implemented on a microcontroller using MPLAB, and finally simulated for speed control of a DC motor in Proteus Virtual System Modeling (VSM) software. Proteus has built in feature to add load torque to a DC motor so simulation results have been presented in three cases speed of DC motor is controlled without load torque, with 25% load torque and with 50% load torque. In all three cases PID effectively controls the speed of DC motor with minimum steady state error.
Źródło:
Advances in Science and Technology. Research Journal; 2016, 10, 31; 40-50
2299-8624
Pojawia się w:
Advances in Science and Technology. Research Journal
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Influence of PWM to trajectory accuracy in mobile robot motion
Autorzy:
Beniak, R.
Pyka, T.
Powiązania:
https://bibliotekanauki.pl/articles/384557.pdf
Data publikacji:
2012
Wydawca:
Sieć Badawcza Łukasiewicz - Przemysłowy Instytut Automatyki i Pomiarów
Tematy:
mobile robot control
kinematic and dynamic control
castor sliding wheel
pulse width modulation (PWM)
Opis:
The paper compares simulation results for direct and PWM control of DC motors in a tri-wheel mobile robot with a castor sliding wheel. Our aim was to determine to what extent PWM control changes the trajectory accuracy. For this purpose, we compare kinematic and dynamic control. To make the model more realistic, we considered the impact of viscous and rolling friction of driving wheels on the motion along the trajectory. We conclude that dynamic control is of higher quality as compared to kinematic control, and that there is a significant impact of PWM control on the trajectory accuracy.
Źródło:
Journal of Automation Mobile Robotics and Intelligent Systems; 2012, 6, 4; 50-56
1897-8649
2080-2145
Pojawia się w:
Journal of Automation Mobile Robotics and Intelligent Systems
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Grid-Tied Neutral Point Clamped based Centralised Photovoltaic Inverter with Improved DC Link Voltage Balancing and Harmonic Minimisation Control
Autorzy:
Bhowmick, Supratik
Mukherjee, Debranjan
Maiti, Suman
Chakraborty, Chandan
Powiązania:
https://bibliotekanauki.pl/articles/1955983.pdf
Data publikacji:
2021
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
photovoltaic multilevel inverter
neutral point voltage balancing
space vector pulse width modulation
current harmonic minimisation
Opis:
This paper proposes an improved space vector pulse width modulation (SVPWM) based DC link voltage balancing control of a three-phase three-level neutral point clamped (NPC) centralised inverter supplying the generated power from photo voltaic (PV) array to a three-phase utility grid. Two possible schemes have been developed based on the power conversion stage between PV array and the utility grid namely, two-stage (three-level boost converter three-phase three-level NPC inverter) and single-stage (three-phase three-level NPC inverter alone). The comparison between these two schemes has been thoroughly discussed in terms of the control strategies employed, power loss analysis and efficiency. The performance of the centralised inverter under different modes of operation has been investigated by developing the required control strategies for smooth operation. Using the proposed control strategy, the centralised inverter can be operated as a static synchronous compensator (STATCOM) during night time, if needed. The power loss incurred in the power-electronic converters has been analysed for constant and also for variable ambient temperature. The effectiveness of the centralised inverter as an active filter (AF) has also been verified when a three-phase non-linear load is considered in the system.
Źródło:
Power Electronics and Drives; 2021, 6, 41; 185-203
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Positive output elementary Luo converter for fixed-frequency ZVS operation
Autorzy:
Bright, S. J. V.
Ramkumar, S.
Anand, H.
Powiązania:
https://bibliotekanauki.pl/articles/200011.pdf
Data publikacji:
2017
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
fixed-frequency ZVS
positive output elementary Luo converter
POELC
zero-voltage switching-pulse width modulation
ZVS-PWM
konwerter Luo
ZVS
Opis:
Luo converter is one amid the developed DC-DC converters offering higher voltage gain. Soft-switching techniques, like zero-voltage switching (ZVS), repress switching losses, and hence the system efficiency and the life of the power semiconductor switches are improved. Incorporation of soft switching in fixed-frequency operation of the Luo converters may persuade them in the regulated power supply applications. The existing variable switching frequency solution suffers from a number of problems viz. complexity in filter designing, more electromagnetic interference (EMI), etc. This paper proposes a positive output elementary Luo converter (POELC) involving ZVS with the wherewithal of working in fixed frequency. A comprehensive discussion on the proposed circuit topology is detailed with both simulation and experimental studies. Systematic descriptions of basic POELC, variable-frequency ZVS-POELC, and fixed-frequency ZVS-POELC make an impact on the understanding of related concepts by the researchers in this field.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2017, 65, 2; 255-262
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An approach to suppress high-frequency resonance using model predictive and selective harmonic elimination combined strategy
Autorzy:
Chen, Sitong
Chen, Xiaoqiang
Wang, Ying
Xiong, Ye
Powiązania:
https://bibliotekanauki.pl/articles/1841300.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
CRH5 EMUs and traction power supply coupled system
high-frequency oscillation
high speed railway
model predictive control (MPC)
selective harmonic elimination pulse-width modulation (SHEPWM)
CRH5 EMU i system sprzężony z zasilaniem trakcyjnym
oscylacja wysokiej częstotliwości
kolej dużych prędkości
kontrola predykcyjna modelu (MPC)
selektywna eliminacja harmoniczna modulacja szerokości impulsu (SHEPWM)
Opis:
High-frequency resonance is a prominent phenomenon which affects the normal operation of the high-speed railway in China. Aiming at this problem, the resonance mechanism is analyzed first. Then, model predictive control and selective harmonic elimination pulse-width modulation (MPC-SHEPWM) combined control strategy is proposed, where the harmonics which cause the resonance can be eliminated at the harmonic source. Besides, the MPC is combined to make the current track the reference in transients. The proposed control has the ability to suppress the resonance while has a faster dynamic performance comparing with SHEPWM. Finally, the proposed MPC-SHEPWM is tested in a simulation model of CRH5 (Chinese Railway High-speed), EMUs (electric multiple units) and a traction power supply coupled system, which shows that the proposed MPC-SHEPWM approach can achieve the resonance suppression and shows a better dynamic performance.
Źródło:
Archives of Electrical Engineering; 2021, 70, 2; 415-430
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Design of a Class-D Audio Amplifier With Analog Volume Control for Mobile Applications
Autorzy:
El Khadiri, K.
Qjidaa, H.
Powiązania:
https://bibliotekanauki.pl/articles/226924.pdf
Data publikacji:
2016
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
class D amplifier
analog volume control
pulse width modulation (PWM)
ramp generator
Opis:
A class-D audio amplifier with analog volume control (AVC) for portable applications is proposed in this paper. The proposed class-D consist of two sections. First section is an analog volume control which consists of an integrator, an analog MUX and a programmable gain amplifier (PGA). The AVC is implemented with three analog inputs (Audio, Voice, FM). Second section is a driver which consists of a ramp generator, a comparator, a level shifter and a gate driver. The driver is designed to obtain a low distortion and a high efficiency. Designed with 0.18 um 1P6M CMOS technology, the class-D audio amplifier with AVC achieves a total root-mean-square (RMS) output power of 0.5W, a total harmonic distortion plus noise (THD+N) at the 8-Ω load less than 0.06% and a power efficiency of 90% with a total area of 1.74 mm2.
Źródło:
International Journal of Electronics and Telecommunications; 2016, 62, 2; 187-198
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
VHDL-Ams Model of the Integrated Membrane Micro-Accelerometer with Delta-Sigma (Δσ) Analog-To-Digital Converter for Schematic Design Level
Autorzy:
Golovatyj, А.
Teslyuk, V.
Kryvyy, R.
Powiązania:
https://bibliotekanauki.pl/articles/411400.pdf
Data publikacji:
2015
Wydawca:
Polska Akademia Nauk. Oddział w Lublinie PAN
Tematy:
Micro-Electro-Mechanical Systems (MEMS)
micromechanical sensitive element
integrated membrane micro-accelerometer
delta-sigma modulation
pulse width modulation (PWM)
delta-sigma analog-todigital converter (ADC)
one bit digital-to-analog converter (DAC)
VHDL-AMS hardware description language
hAMSter software
schemotechnical design level
Opis:
VHDL-Ams model of integrated membrane type micro-accelerometer with delta-sigma (ΔΣ) analog-to-digital converter for schematic design level was developed. It allows simulating movement of the sensitive element working weigh from the applied acceleration, differential capacitor and original signal capacity change, signal digitizing with the help of DeltaSigma ADC with defined micro-accelerometer structural parameters, and analyzze an integrated device at the schemotechnical design level.
Źródło:
ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes; 2015, 4, 2; 65-70
2084-5715
Pojawia się w:
ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An active power filter based on a hybrid converter topology – Part 1
Autorzy:
Gwóźdź, Michał
Ciepliński, Łukasz
Powiązania:
https://bibliotekanauki.pl/articles/2173586.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
shunt active power filter
pulse width modulation
PWM
sigma-delta modulator
silicon carbide
bocznikowy filtr mocy czynnej
modulacja szerokości impulsu
modulator sigma-delta
węglik krzemu
Opis:
This paper presents a concept of a shunt active power filter, which is able to provide more precise mapping of its input current drawn from a power line in a reference signal, as compared to a typical filter solution. It can be achieved by means of an interconnection of two separate power electronics converters making, as a whole, a controlled current source, which mainly determines the quality of the shunt active filter operation. One of these power devices, the “auxiliary converter”, corrects the total output current, being a sum of output currents of both converters, toward the reference signal. The rated output power of the auxiliary converter is much lower than the output power of the main one, while its frequency response is extended. Thanks to both these properties and the operation of the auxiliary converter in a continuous mode, pulse modulation components in the filter input current are minimized. Benefits of the filter are paid for by a relatively small increase in the complexity and cost of the system. The proposed solution can be especially attractive for devices with higher output power, where, due to dynamic power loss in power switches, a pulse modulation carrier frequency must be lowered, leading to the limitation of the “frequency response” of the converter. The concept of such a system was called the “hybrid converter topology”. In the first part of the paper, the rules of operation of the active filter based on this topology are presented. Also, the results of comparative studies of filter simulation models based on both typical, i.e. single converter, and hybrid converter topologies, are discussed.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 1; art. no. e136218
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An active power filter based on a hybrid converter topology – Part 1
Autorzy:
Gwóźdź, Michał
Ciepliński, Łukasz
Powiązania:
https://bibliotekanauki.pl/articles/2090725.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
shunt active power filter
pulse width modulation
PWM
sigma-delta modulator
silicon carbide
bocznikowy filtr mocy czynnej
modulacja szerokości impulsu
modulator sigma-delta
węglik krzemu
Opis:
This paper presents a concept of a shunt active power filter, which is able to provide more precise mapping of its input current drawn from a power line in a reference signal, as compared to a typical filter solution. It can be achieved by means of an interconnection of two separate power electronics converters making, as a whole, a controlled current source, which mainly determines the quality of the shunt active filter operation. One of these power devices, the “auxiliary converter”, corrects the total output current, being a sum of output currents of both converters, toward the reference signal. The rated output power of the auxiliary converter is much lower than the output power of the main one, while its frequency response is extended. Thanks to both these properties and the operation of the auxiliary converter in a continuous mode, pulse modulation components in the filter input current are minimized. Benefits of the filter are paid for by a relatively small increase in the complexity and cost of the system. The proposed solution can be especially attractive for devices with higher output power, where, due to dynamic power loss in power switches, a pulse modulation carrier frequency must be lowered, leading to the limitation of the “frequency response” of the converter. The concept of such a system was called the “hybrid converter topology”. In the first part of the paper, the rules of operation of the active filter based on this topology are presented. Also, the results of comparative studies of filter simulation models based on both typical, i.e. single converter, and hybrid converter topologies, are discussed.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 1; e136218, 1--10
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Investigation on Control Strategies for a Single-Phase Photovoltaic Inverter Using PSCAD/EMTDC Software
Autorzy:
Henz, Cristiano Luiz
Gasparin, Fabiano Perin
Powiązania:
https://bibliotekanauki.pl/articles/1956010.pdf
Data publikacji:
2021
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
DC/DC converter
DC/AC converter
photovoltaic module
pulse width modulation
solar energy
Opis:
In the last decades, electric power produced through photovoltaic conversion has been increasing because of the need to reduce fossil fuel burning. Recently, photovoltaic systems have become more competitive and their role in the renewable energies market share is steadily gaining in importance. Improvements in the power electronics employed in the DC/AC conversion are topics of interest in the quest for more efficient and eventually reduced-cost inverters. The goal of this paper is to perform an investigation of control strategies and propose a topology for a single-phase DC/AC converter for photovoltaic arrays using the simulation software Power System Computer Aided Design/Electromagnetic Transient Design and Control (PSCAD/EMTDC). The circuit proposed in this paper employs an isolating transformer to a grid-connected photovoltaic inverter. The control strategy proposed uses the instantaneous reactive power theory (p–q theory) and phase-locked loop (PLL). The p-q theory uses two virtual axes in the Park Transformation, which provide to the control system a good dynamic response, accuracy, and decoupling between the control and power system. Computer simulations using the electromagnetic transient software PSCAD show the efficiency of the proposed strategy for a single-phase inverter. The control strategy and topology are quite simple and easy to implement in the future using a Digital Signal Processor (DSP). The results provide insights into new power electronics solutions, which can improve the efficiency and efficacy of the current available in DC/AC converters for photovoltaic systems.
Źródło:
Power Electronics and Drives; 2021, 6, 41; 75-99
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Averaged models of pulse-modulated DC-DC power converters. Part I. Discussion of standard methods
Autorzy:
Janke, W.
Powiązania:
https://bibliotekanauki.pl/articles/140859.pdf
Data publikacji:
2012
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
power converters
pulse width modulation (PWM)
BUCK
BOOST
buck-boost
averaged models
Opis:
The averaged models of switch-mode DC-DC power converters are discussed. Two methods of averaged model derivation are considered - the first, based on statespace averaging and the second, on the switch averaging approach. The simplest converters: BUCK, BOOST and BUCK-BOOST working in CCM (continuous conduction mode) or DCM are taken as examples in detailed considerations. Apart from the ideal converters, the more realistic case of converters with parasitic resistances is analyzed. The switch averaging approach is used more frequently than the other and is believed to be more convenient in practical applications. It is shown however, that in the deriving the averaged models based on the switch-averaging approach, some informalities have been made, which may be the source of errors in the case of converters with parasitic resistances, or working in DCM mode.
Źródło:
Archives of Electrical Engineering; 2012, 61, 4; 609-631
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Averaged models of pulse-modulated DC-DC power converters. Part II. Models based on the separation of variables
Autorzy:
Janke, W.
Powiązania:
https://bibliotekanauki.pl/articles/140855.pdf
Data publikacji:
2012
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
power converters
pulse width modulation (PWM)
BUCK
buck-boost
BOOST
averaged models
Opis:
The separation of variables approach to formulate the averaged models of DC-DC switch-mode power converters is presented in the paper. The proposed method is applied to basic converters such as BUCK, BOOST and BUCK-BOOST. The ideal converters or converters with parasitic resistances, working in CCM and in DCM mode are considered. The models are presented in the form of equation systems for large signal, steady-state and small-signal case. It is shown, that the models obtained by separation of variables approach differ in some situations from standard models based on switch averaging method.
Źródło:
Archives of Electrical Engineering; 2012, 61, 4; 633-654
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Single-source three-phase switched-capacitor-based MLI
Autorzy:
Jena, Kasinath
Gupta, Krishna Kumar
Bhatnagar, Pallavee
Jain, Sanjay K.
Stala, Robert
Waradzyn, Zbigniew
Piróg, Stanisław
Penczek, Adam
Mondzik, Andrzej
Skała, Aleksander
Powiązania:
https://bibliotekanauki.pl/articles/2175942.pdf
Data publikacji:
2022
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
multilevel inverter
switched capacitor
multicarrier pulse width modulation
cost function
ANPC inverter
Opis:
This article proposes a novel three-phase inverter based on the concept of switched capacitors (SCs), which uses a single DC source. A three-phase, seven-level line-to-line output voltage waveform is synthesised by the proposed topology, which includes eight switches, two capacitors, and one diode per phase leg. The proposed topology offers advantages in terms of inherent voltage gain, lower voltage stresses on power switches, and a reduced number of switching components. Additionally, the switched capacitors are self-balanced, thereby eliminating the need for a separate balancing circuit. The proposed structure and its operating principle, the self-balancing mechanism of the capacitors, and the control strategy are all thoroughly explained in the article. The proposed topology has also been compared with some recent SC topologies. Lastly, the proposed topology has been shown to be feasible through simulation and experimentation.
Źródło:
Power Electronics and Drives; 2022, 7, 42; 197--209
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Linearized 9-Bit Hybrid LBDD PWM Modulator for Digital Class-BD Amplifier
Autorzy:
Kołodziejski, Wojciech
Kuta, Stanisław
Powiązania:
https://bibliotekanauki.pl/articles/1844591.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
class-BD digital audio amplifier
linearized pulse width modulation (LPWM)
Linearized Class-BD Double sided (LBDD)
Digital to Time Converter (DTC)
Opis:
The paper presents an original architecture and implementation of 9-bit Linearized Pulse Width Modulator (LPWM) for Class-BD amplifier, based on the hybrid method using STM32 microcontroller and Programmable Tapped Delay Line (PTDL). The analog input signals are converted into 12-bit PCM signals, then are directly transformed into 32-bit LBDD DPWM data of the pulse-edge locations within n-th period of the switching frequency, next requantized to the 9-bit digital outputs, and finally converted into the two physical trains of 1-bit PWM signals, to control the output stage of the Class-BD audio amplifier. The hybrid 9-bit quantizer converts 6 MSB bits using counter method, based on the peripherals of STM32 microcontroller, while the remaining 3 LSB bits - using a method based on the PTDL. In the paper extensive verification of algorithm and circuit operation as well as simulation in MATLAB and experimental results of the proposed 9-bit hybrid LBDD DPWM circuit have been performed. It allows to attain SNR of 80 dB and THD about 0,3% within the audio baseband.
Źródło:
International Journal of Electronics and Telecommunications; 2021, 67, 1; 49-57
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Wyświetlanie 1-15 z 27

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