Informacja

Drogi użytkowniku, aplikacja do prawidłowego działania wymaga obsługi JavaScript. Proszę włącz obsługę JavaScript w Twojej przeglądarce.

English (EN)·Polski (PL)·Yкраїнський (UK)
Przejdź do strony domowej biblioteki Centralna Biblioteka Wojskowa Link otwiera się w nowym oknie Logo biblioteki Prolib Integro - strona głównaCentralna Biblioteka Wojskowa

Wyszukujesz frazę "power attacks" wg kryterium: Temat

  Lista filtrów
Wyrównaj
    Wyświetlanie 1-2 z 2
    Tytuł:
    Overview of round one power attacks on SHA-3 Based MAC
    Autorzy:
    Millar, Kevin
    Chu, Chun-Yi
    Łukowiak, Marcin
    Powiązania:
    https://bibliotekanauki.pl/articles/397819.pdf
    Data publikacji:
    2018
    Wydawca:
    Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
    Tematy:
    SHA-3
    power attacks
    FPGA
    atak energetyczny
    Opis:
    Digital signatures and message authentication codes are the two most common applications of cryptographic hash functions. Others range from ensuring data integrity to randomization functions and key derivation. Because of there cent break of the SHA-1 hash function, it is expected that in the nearest future there will be an increasing interest in the new SHA-3 algorithm. SHA-3 implements a subset of the Keccak family and was released as the NIST standard in 2015.SHA-3 based MAC is a keyed-hash message authentication function, which can be used to verify both the data integrity of a message and its source. Though Keccak is cryptographically secure, implementations of the algorithm may be susceptible to power analysis attacks if not sufficiently protected. This work implements and analyzes two correlation power analysis (CPA)attacks targeting the round one operations of a SHA-3 based MAC implementation on an FPGA.
    Źródło:
    International Journal of Microelectronics and Computer Science; 2018, 9, 3; 114-122
    2080-8755
    2353-9607
    Pojawia się w:
    International Journal of Microelectronics and Computer Science
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    On-chip current-mode approach to thwart CPA attacks in CMOS nanometer technology
    Autorzy:
    Bellizia, D.
    Scotti, G.
    Trifiletti, A.
    Powiązania:
    https://bibliotekanauki.pl/articles/398086.pdf
    Data publikacji:
    2016
    Wydawca:
    Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
    Tematy:
    IoT
    internet of things (IoT)
    Power Analysis Attacks
    smart card
    CPA
    current-mode
    Side Channel Analysis
    CMOS
    Cryptography
    PRESENT
    Internet rzeczy
    karta inteligentna
    moduły prądowe
    kryptografia
    Opis:
    The protection of information that reside in smart devices like IoT nodes is becoming one of the main concern in modern design. The possibility to mount a non-invasive attack with no expensive equipment, such as a Power Analysis Attack (PAA), remarks the needs of countermeasures that aims to thwart attacks exploiting power consumption. In addition to that, designers have to deal with demanding requirements, since those smart devices require stringent area and energy constraints. In this work, a novel analog-level approach to counteract PAA is presented, taking benefits of the current-mode approach. The kernel of this approach is that the information leakage exploited in a PAA is leaked through current absorption of a cryptographic device. Thanks to an on-chip measuring of the current absorbed by the cryptographic logic, it is possible to generate an error signal. Throughout a current-mode feedback mechanism, the data-dependent component of the overall consumption can be compensated, making the energy requirement constant at any cycle and thwarting the possibility to recover sensible information. Two possible implementations of the proposed approach are presented in this work and their effectiveness has been evaluated using a 40nm CMOS design library. The proposed approach is able to increase the Measurements to Disclosure (MTD) of at least three orders of magnitude, comparing to the unprotected implementation. It has to be pointed out that the on-chip current-mode suppressor, based on the proposed approach, is able to provide a very good security performance, while requiring a very small overhead in terms of silicon area (xl.007) and power consumption (xl.07).
    Źródło:
    International Journal of Microelectronics and Computer Science; 2016, 7, 4; 147-156
    2080-8755
    2353-9607
    Pojawia się w:
    International Journal of Microelectronics and Computer Science
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-2 z 2

      Ta witryna wykorzystuje pliki cookies do przechowywania informacji na Twoim komputerze. Pliki cookies stosujemy w celu świadczenia usług na najwyższym poziomie, w tym w sposób dostosowany do indywidualnych potrzeb. Korzystanie z witryny bez zmiany ustawień dotyczących cookies oznacza, że będą one zamieszczane w Twoim komputerze. W każdym momencie możesz dokonać zmiany ustawień dotyczących cookies