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Wyszukujesz frazę "power MOSFET" wg kryterium: Temat


Wyświetlanie 1-15 z 15
Tytuł:
Current-fed quasi-Z-source H7 inverter with reduced stress on SiC power devices
Autorzy:
Trochimiuk, P.
Zdanowski, M.
Rabkowski, J.
Powiązania:
https://bibliotekanauki.pl/articles/201436.pdf
Data publikacji:
2019
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
inverters
silicon carbide
power MOSFET
battery
energy storage
Opis:
This paper discusses selected problems regarding a high-frequency improved current-fed quasi-Z-source inverter (iCFqZSI) designed and built with SiC power devices. At first, new, modified topology of the impedance network is presented. As the structure is derived from the series connection of two networks, the voltage stress across the SiC diodes and the inductors is reduced by a factor of two. Therefore, the SiC MOSFETs may be switched with frequencies above 100 kHz and volume and weight of the passive components is decreased. Furthermore, additional leg with two SiC MOSFETs working as a bidirectional switch is added to limit the current stress during the short-through states. In order to verify the performance of the proposed solution a 6 kVA laboratory model was designed to connect a 400 V DC source (battery) and a 3£400 V grid. According to presented simulations and experimental results high-frequency iCFqZSI is bidirectional – it may act as an inverter, but also as a rectifier. Performed measurements show correct operation at switching frequency of 100 kHz, high quality of the input and output waveforms is observed. The additional leg increases efficiency by up to 0.6% – peak value is 97.8%.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2019, 67, 6; 1085-1094
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
The desctiption of turn-off process and evaluation of switching power losses in the ultra fast power MOSFET
Autorzy:
Grzejszczak, P.
Barlik, R.
Powiązania:
https://bibliotekanauki.pl/articles/1193214.pdf
Data publikacji:
2016
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
power MOSFET
turn-off transient
parasitic capacitance
switching losses
thermovision measurement
Opis:
The article presents an analytical description of the turn-off process of the power MOSFET suitable for use in high-frequency converters. The purpose of this description is to explain the dynamic phenomena occurring inside the transistor and contributing to the switching power losses. The detailed description uses the results of simulation studies carried out using a very precise model of the CoolMOS transistor manufactured by Infineon (IPW60R070C6). The theoretical analysis has been verified in experimental measurements of power dissipated during turn-off transient of MOSFET operating in a full bridge converter with switching frequency of 100 kHz. To estimate these switching losses an original thermovision method based on the measurement of heat dissipated in the power semiconductor switches has been used. The obtained results confirm the correctness of the conclusions drawn from the theoretical analysis presented in this paper.
Źródło:
Power Electronics and Drives; 2016, 1, 36/1; 55-67
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Multiparameter reliability model for SiC power MOSFET subjected to repetitive thermomechanical load
Autorzy:
Bąba, Sebastian
Powiązania:
https://bibliotekanauki.pl/articles/2173625.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
reliability engineering
reliability modelling
power MOSFET
SiC
silicon carbide
inżynieria niezawodności
modelowanie niezawodności
węglik krzemu
tranzystor mocy MOSFET
Opis:
The main drawback of any Design for Reliability methodology is lack of easy accessible reliability models, prepared individually for each critical component. In this paper, a reliability model for SiC power MOSFET in SOT – 227 B housing, subjected to power cycling, is presented. Discussion covers preparation of Accelerated Lifetime Test required to develop such reliability model, analysis of semiconductor degradation progress, samples post-failure analysis and identification of reliability model parameters. Such model may be further used for failure prognostics or useful lifetime estimation of High Performance Power Supplies.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 3; art. no. e137386
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Multiparameter reliability model for SiC power MOSFET subjected to repetitive thermomechanical load
Autorzy:
Bąba, Sebastian
Powiązania:
https://bibliotekanauki.pl/articles/2090738.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
reliability engineering
reliability modelling
power MOSFET
SiC
silicon carbide
inżynieria niezawodności
modelowanie niezawodności
węglik krzemu
tranzystor mocy MOSFET
Opis:
The main drawback of any Design for Reliability methodology is lack of easy accessible reliability models, prepared individually for each critical component. In this paper, a reliability model for SiC power MOSFET in SOT – 227 B housing, subjected to power cycling, is presented. Discussion covers preparation of Accelerated Lifetime Test required to develop such reliability model, analysis of semiconductor degradation progress, samples post-failure analysis and identification of reliability model parameters. Such model may be further used for failure prognostics or useful lifetime estimation of High Performance Power Supplies.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 3; e137386, 1--8
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Analysis and optimization of LUDMOS transistors on a 0.18um SOI CMOS technology
Autorzy:
Toulon, G.
Cortés, I.
Morancho, F.
Villard, B.
Powiązania:
https://bibliotekanauki.pl/articles/397849.pdf
Data publikacji:
2010
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
moc MOSFET
LDMOS
RESURF
STI (płytki rów izolacyjny)
krzem na izolatorze
power MOSFET
STI (shallow trench isolation)
superjunction
silicon-on-insulator
Opis:
This paper is focused on the design and optimization of power LDMOS transistors (V br > 120 Volts) with the purpose of being integrated in a new generation of Smart Power technology based upon a 0.18 μm SOI-CMOS technology. The benefits of applying the shallow trench isolation (STI) concept along with the 3D RESURF concept in the LDMOS drift region is analyzed in terms of the main static (Ron-sp/Vbr tradeoff) and dynamic (Miller capacitance and QgxRon FOM) characteristics. The influence of some design parameters such as the polysilicon gate electrode length and the STI length are exhaustively analyzed.
Źródło:
International Journal of Microelectronics and Computer Science; 2010, 1, 1; 3-8
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Niskostratny drajwer tranzystora MOSFET mocy
Low Loss Power MOSFET Driver
Autorzy:
Legutko, P.
Powiązania:
https://bibliotekanauki.pl/articles/155591.pdf
Data publikacji:
2014
Wydawca:
Stowarzyszenie Inżynierów i Techników Mechaników Polskich
Tematy:
drajwer
straty mocy
czasy przełączeń
tranzystor MOSFET
driver
analysis
power losses
MOSFET transistor
Opis:
W artykule przedstawiono nową konstrukcję dyskretnego drajwera dedykowanego do zastosowań z wysokoczęstotliwościowymi tranzystorami MOSFET mocy. Przedstawiono przebiegi czasowe oraz charakterystyki strat mocy zarówno drajwerów scalonych, jak i nowego dyskretnego układu. Opracowany dyskretny układ drajwera charakteryzuje się niskimi stratami mocy i krótszymi czasami przełączeń przy częstotliwości 30 MHz. Koszt opracowania nowego drajwera jest kilkakrotnie niższy niż koszt zakupu drajwera scalonego.
This paper presents a systematic approach to the design of high performance gate drive circuits for high speed switching applications. Two integrated drivers DEIC420, DEIC515 and additionally one discrete driver UCC27526 have been designed in the project. The UCC27526 driver was built with low-power discrete circuits connected in parallel by means of appropriate buffers reinforcement signal generator. Figure 1 shows the transistor gate circuit connected to the driver circuit. Figures 2 and 3 present the circuit driver UCC27526. Additionally, in this paper there are presents the characteristics of the driver input power (Fig. 4) for three operating states: a) no load; b) capacitance load 3 nF; c) loading with MOSFET gate. The output voltage waveforms for the DEIC420 and 8xUCC27526 drivers for three operating states are shown in Figures 5 and 6. The new MOSFET Drivers have been verified by use in the universal laboratory in the Department of Power Electronics, Electrical Drives and Robotics of Silesian University of Technology.
Źródło:
Pomiary Automatyka Kontrola; 2014, R. 60, nr 3, 3; 188-191
0032-4140
Pojawia się w:
Pomiary Automatyka Kontrola
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Double-gate MOSFET Model Implemented in Verilog-AMS Language for the Transient Simulation and the Configuration of Ultra Low-power Analog Circuits
Autorzy:
Smaani, Billel
Meraihi, Yacin
Nafa, Fares
Benlatreche, Mohamed Salah
Akroum, Hamza
Latreche, Saida
Powiązania:
https://bibliotekanauki.pl/articles/2055208.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
double-gate MOSFET
compact model
ultra low power analog circuits
Opis:
This paper deals with the implementation of a DC and AC double-gate MOSFET compact model in the Verilog-AMS language for the transient simulation and the configuration of ultra low-power analog circuits. The Verilog-AMS description of the proposed model is inserted in SMASH circuit simulator for the transient simulation and the configuration of the Colpitts oscillator, the common-source amplifier, and the inverter. The proposed model has the advantages of being simple and compact. It was validated using TCAD simulation results of the same transistor realized with Silvaco Software.
Źródło:
International Journal of Electronics and Telecommunications; 2021, 67, 4; 609--614
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Comparison of Electrical Performances of Power Electronics Switches and an Effective Switch Selection Algorithm
Autorzy:
Zenk, H.
Powiązania:
https://bibliotekanauki.pl/articles/1031000.pdf
Data publikacji:
2018-04
Wydawca:
Polska Akademia Nauk. Instytut Fizyki PAN
Tematy:
power electronics switches (PES)
switch selection algorithm (SSA)
IGBT
MOSFET
BJT
diode
Opis:
Electronics switches commonly used in power electronics circuits are the part of the electronics system depending on energy efficiency, circuit topology, switching matrix design, interaction with filter elements, and many other parameters. For the first new switch design prototype to identify of electrical efficiency of the semiconductor switch working with a system, it is very important that estimation of the variables saves time, labor, and economical resources. In this study, the new algorithm is proposed and applied to circuit estimate efficiency of power electronics switches. The current-voltage-power capacities, switching rate, power losses, physical dimensions, heating levels of power electronics switches used in the circuit are investigated and algorithmically estimated according to the result of experimental performance switches.
Źródło:
Acta Physica Polonica A; 2018, 133, 4; 897-901
0587-4246
1898-794X
Pojawia się w:
Acta Physica Polonica A
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Application of artificial bee colony algorithm to auto-tuning of state feedback controller for DC-DC power converter
Autorzy:
Tarczewski, T.
Niewiara, Ł. J.
Grzesiak, L M.
Powiązania:
https://bibliotekanauki.pl/articles/1193254.pdf
Data publikacji:
2016
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
artificial bee colony algorithm
state feedback controller
DC-DC power converter
SiC MOSFET
Opis:
The article presents an auto-tuning method of state feedback voltage controller for DC-DC power converter. The penalty matrices employed for calculation of controller’s coefficients were obtained by using nature-inspired artificial bee colony (ABC) optimization algorithm. This overcomes the main drawback of state feedback control related to time-consuming trial-and-error tuning procedure. The optimization algorithm takes into account constraints of selected state and control variables of DC-DC power converter. In order to meet all control objectives (i.e., fast voltage response and chattering-free control signal) an appropriate performance index is proposed. Proper selection of state feedback controller (SFC) coefficients is proven by simulation and experimental tests of DC-DC power converter.
Źródło:
Power Electronics and Drives; 2016, 1, 36/2; 83-96
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
The temperature dependence of subthreshold characteristics of Si and SiC power MOSFETs
Autorzy:
Kraśniewski, J.
Janke, W.
Powiązania:
https://bibliotekanauki.pl/articles/118323.pdf
Data publikacji:
2016
Wydawca:
Politechnika Koszalińska. Wydawnictwo Uczelniane
Tematy:
MOSFET
power transistor
subthreshold
temperature dependence
tranzystor mocy
obszar podprogowy
zależność od temperatury
Opis:
In the paper, subthreshold characteristics of Si and SiC MOSFET power transistors in a wide range of current and temperature are considered. Representative examples of measured iD-vGS dependencies for temperatures from 20°C up to over 140°C are presented and discussed. Substantial differences of the shapes obtained for Si and SiC devices are observed. The subthreshold slope and subthreshold swing coefficient are extracted from measured curves for two types of devices and compared.
W niniejszym artykule porównano charakterystyki w obszarze podprogowym tranzystorów mocy MOSFET z krzemu i węglika krzemu w szerokim zakresie prądu i temperatury. Dla reprezentatywnej partii tranzystorów przedstawiono i omówiono pomiary zależności iD-vGS w szerokim zakresie temperatur od 20°C do ponad 140°C. Dodatkowo zaprezentowano różnice w wartości nachylenia oraz wahania współczynnika w obszarze podprogowym od temperatury otoczenia dla badanych tranzystorów z Si i SiC.
Źródło:
Zeszyty Naukowe Wydziału Elektroniki i Informatyki Politechniki Koszalińskiej; 2016, 9; 51-58
1897-7421
Pojawia się w:
Zeszyty Naukowe Wydziału Elektroniki i Informatyki Politechniki Koszalińskiej
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
High voltage pulse generation using magnetic pulse compression
Autorzy:
Balcerak, M.
Hołub, M.
Pałka, R.
Powiązania:
https://bibliotekanauki.pl/articles/141756.pdf
Data publikacji:
2013
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
kicker power supply
power source for pulse corona discharge
magnetic pulse compression
parallel connection of IGBT and MOSFET transistors
Opis:
The paper presents an overview of a method of nanosecond-scale high voltage pulse generation using magnetic compression circuits. High voltage (up to 18 kV) short pulses (up to 1.4 μs) were used for Pulsed Corona Discharge generation. In addition, the control signal of parallel connection of IGBT and MOSFET power transistor influence on system losses is discussed. For a given system topology, an influence of core losses on overall pulse generator efficiency is analysed.
Źródło:
Archives of Electrical Engineering; 2013, 62, 3; 463-472
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Investigation of a High-efficiency and High-frequency 10-kW/800-V Three-phase PWM Converter with Direct Power Factor Control
Autorzy:
Barlik, Roman
Grzejszczak, Piotr
Leszczyński, Bernard
Szymczak, Marek
Powiązania:
https://bibliotekanauki.pl/articles/226672.pdf
Data publikacji:
2019
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
three-phase PWM rectifier
reactive power compensator
silicon carbide MOSFET
bidirectional power flow
direct power control (DPC)
DC voltage regulation
power factor correction (PFC)
LCL filter
Opis:
The paper presents a concept of a control system for a high-frequency three-phase PWM grid-tied converter (3x400 V / 50 Hz) that performs functions of a 10-kW DC power supply with voltage range of 600÷800 V and of a reactive power compensator. Simulation tests (in PLECS) allowed proper selection of semiconductor switches between fast IGBTs and silicon carbide MOSFETs. As the main criterion minimum amount of power losses in semiconductor devices was adopted. Switching frequency of at least 40 kHz was used with the aim of minimizing size of passive filters (chokes, capacitors) both on the AC side and on the DC side. Simulation results have been confirmed in experimental studies of the PWM converter, the power factor of which (inductive and capacitive) could be regulated in range from 0.7 to 1.0 with THDi of line currents below 5% and energy efficiency of approximately 98.5%. The control system was implemented in Texas Instruments TMS320F28377S microcontroller.
Źródło:
International Journal of Electronics and Telecommunications; 2019, 65, 4; 619-624
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Advanced compact modeling of the deep submicron technologies
Autorzy:
Grabiński, W.
Bucher, M.
Sallese, J.-M.
Krummenacher, F.
Powiązania:
https://bibliotekanauki.pl/articles/309312.pdf
Data publikacji:
2000
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
ultra deep submicron (UDSM) technology
compact modeling
EKV MOS transistor model
MOSFET
matching
low power
RF applications
Opis:
The technology of CMOS large-scale integrated circuits (LSI's) achieved remarkable advances over last 25 year and the progress is expected to continue well into the next century. The progress has been driven by the downsizing of the active devices such as MOSFETs. Approaching these dimensions, MOSFET characteristics cannot be accurately predicted using classical modeling methods currently used in the most common MOSFET models such as BSIM, MM9 etc, without introducing large number of empirical parameters. Various physical effects that needed to be considered while modeling UDSM devices: quantization of the inversion layer, mobility degradation, carrier velocity saturation and overshoot, polydepletion effects, bias dependent source/drain resistances and capacitances, vertical and lateral doping profiles, etc. In this paper, we will discuss the progress in the CMOS technology and the anticipated difficulties of the sub-0.25 žm LSI downsizing. Subsequently, basic MOSFET modeling methodologies that are more appropriate for UDSM MOSFETs will be presented as well. The advances in compact MOSFET devices will be illustrated using application examples of the EPFL EKV model
Źródło:
Journal of Telecommunications and Information Technology; 2000, 3-4; 31-42
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Problems related to the correct determination of switching power losses in high-speed SiC MOSFET power modules
Autorzy:
Zięba, Dawid
Rąbkowski, Jacek
Powiązania:
https://bibliotekanauki.pl/articles/2173649.pdf
Data publikacji:
2022
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
SiC MOSFET
power modules
channel current
switching losses
time alignment
moduł mocy
prąd kanału
straty przełączania
wyrównanie czasu
Opis:
High-speed switching capabilities of SiC MOSFET power modules allow building high power converters working with elevated switching frequencies offering high efficiencies and high power densities. As the switching processes get increasingly rapid, the parasitic capacitances and inductances appearing in SiC MOSFET power modules affect switching transients more and more significantly. Even relatively small parasitic capacitances can cause a significant capacitive current flow through the SiC MOSFET power module. As the capacitive current component in the drain current during the turn-off process is significant, a commonly used metod of determining the switching power losses based on the product of instantaneous values of drain-source voltage and drain current may lead to a severe error. Another problem is that charged parasitic capacitances discharge through the MOSFET resistive channel during the turn-on process. As this happens in the internal structure, that current is not visible on the MOSFET terminals. Fast switching processes are challenging to measure accurately due to the imperfections of measurement probes, like their output signals delay mismatch. This paper describes various problems connected with the correct determination of switching power losses in high-speed SiC MOSFET power modules and proposes solutions to these problems. A method of achieving a correct time alignment of waveforms collected by voltage and current probes has been shown and verified experimentally. In order to estimate SiC MOSFET channel current during the fast turn-off process, a method based on the estimation of nonlinear parasitic capacitances current has also been proposed and verified experimentally.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2022, 70, 2; art. no. e140695
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A study on power losses of the 50 kVA SiC converter including reverse conduction phenomenon
Autorzy:
Rąbkowski, J.
Płatek, T.
Powiązania:
https://bibliotekanauki.pl/articles/201547.pdf
Data publikacji:
2016
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
power losses
three-phase converter
MOSFET
Schottky diode
reverse conduction
straty mocy
konwerter trójfazowy
dioda Schottky'ego
odwrotne przewodzenie ciepła
Opis:
This paper deals with performance of the 50 kVA three-phase converter built with switches based on SiC MOSFET and anti-parallel Schottky diodes. In contrast to popular IGBT converters, a negative switch current is capable of flowing through the reverse conducting transistor, which results in different distribution of power losses among the devices. Thus, equations describing the conduction power losses of the transistor and diode are improved and verified by means of circuit simulations in Saber. Moreover, a comparison of power losses calculated with the use of standard and new equations is also shown. Total power losses in three SiC MOSFET modules of a 50 kVA converter operating at 20 kHz are up to 30% lower when reverse conduction is taken into account. This shows the importance of the discussed problem and proves that much better accuracy in the estimation of power losses and junction temperatures of SiC devices may be obtained with the proposed approach.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2016, 64, 4; 907-914
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
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