Informacja

Drogi użytkowniku, aplikacja do prawidłowego działania wymaga obsługi JavaScript. Proszę włącz obsługę JavaScript w Twojej przeglądarce.

English (EN)·Polski (PL)·Yкраїнський (UK)
Przejdź do strony domowej biblioteki Centralna Biblioteka Wojskowa Link otwiera się w nowym oknie Logo biblioteki Prolib Integro - strona głównaCentralna Biblioteka Wojskowa

Wyszukujesz frazę "parasitics" wg kryterium: Temat

  Lista filtrów
Wyrównaj
    Wyświetlanie 1-5 z 5
    Tytuł:
    Extended Feedback Linearisation Control of Non-ideal DCDC Buck Converter in Continuous-conduction Mode
    Autorzy:
    Csizmadia, Miklos
    Kuczmann, Miklos
    Powiązania:
    https://bibliotekanauki.pl/articles/2175943.pdf
    Data publikacji:
    2022
    Wydawca:
    Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
    Tematy:
    DC-DC buck converter
    feedback linearisation
    inrush current
    parasitics
    Ackermann
    Opis:
    This paper presents an extended form of Feedback Linearisation Control (FBLC), which is tested in a non-ideal buck converter in Continuous-conduction Mode (CCM). The FBLC is often used in power electronics to control a non-linear system, due to its advantageous properties. The application of the error integrator shows better steady-state and transient properties, such as a decrease of inrush current. The linearised system has been controlled by the pole placement and the technique is illustrated through an example and simulated via Matlab. The results have been compared by using a classical PID controller, allowing the benefits of FBLC to be highlighted.
    Źródło:
    Power Electronics and Drives; 2022, 7, 42; 1--8
    2451-0262
    2543-4292
    Pojawia się w:
    Power Electronics and Drives
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Evaluation of gate drive circuit effect in cascode GaN-based applications
    Autorzy:
    Tan, Q. Y.
    Narayanan, E. M. S.
    Powiązania:
    https://bibliotekanauki.pl/articles/2173545.pdf
    Data publikacji:
    2021
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    cascode GaNFETs
    parasitics
    buck converter
    gate drive design
    kaskoda GaNFETs
    przetwornica
    pasożytnictwo
    projekt napędu bramy
    Opis:
    This work evaluates the influence of gate drive circuitry to cascode GaN device’s switching waveforms. This is done by comparing three PCBs using three double-pulse-test (DPT) with different gate driving loop design. Among important parasitic elements, source-side inductance shows a significant impact to gate-source voltage waveform. A simulation model based on experimental measurement of the cascode GaNFET used in this work is modified by author. The simulation model is implemented in a synchronous buck converter topology and hereby to assess the impact of gate driving loop of cascode GaN device in both continuous conduction mode (CCM) and critical conduction mode (CRM). Apart from simulation, a synchronous buck converter prototype is presented for experimental evaluation, which shows a 99.15% efficiency at 5A under soft-switching operation (CRM) with a 59ns dead-time.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 2; art. no. e136742
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Evaluation of gate drive circuit effect in cascode GaN-based applications
    Autorzy:
    Tan, Q. Y.
    Narayanan, E. M. S.
    Powiązania:
    https://bibliotekanauki.pl/articles/2128152.pdf
    Data publikacji:
    2021
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    cascode GaNFETs
    parasitics
    buck converter
    gate drive design
    kaskoda GaNFETs
    przetwornica
    pasożytnictwo
    projekt napędu bramy
    Opis:
    This work evaluates the influence of gate drive circuitry to cascode GaN device’s switching waveforms. This is done by comparing three PCBs using three double-pulse-test (DPT) with different gate driving loop design. Among important parasitic elements, source-side inductance shows a significant impact to gate-source voltage waveform. A simulation model based on experimental measurement of the cascode GaNFET used in this work is modified by author. The simulation model is implemented in a synchronous buck converter topology and hereby to assess the impact of gate driving loop of cascode GaN device in both continuous conduction mode (CCM) and critical conduction mode (CRM). Apart from simulation, a synchronous buck converter prototype is presented for experimental evaluation, which shows a 99.15% efficiency at 5A under soft-switching operation (CRM) with a 59ns dead-time.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 2; e136742, 1--7
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Automated substrate resistance extraction in nanoscale VLSI by exploiting a geometry-based analytical model
    Autorzy:
    Bontzios, Y. I.
    Dimopoulos, M. G.
    Hatzopoulos, A. A.
    Powiązania:
    https://bibliotekanauki.pl/articles/398110.pdf
    Data publikacji:
    2011
    Wydawca:
    Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
    Tematy:
    szum podłożowy
    układ scalony
    modelowanie geometryczne
    pochodzenie oporu
    modelowanie oporu
    zasilanie pasożytnicze
    substrate noise
    integrated circuits
    geometric modeling
    resistance extraction
    resistance modeling
    parasitics
    Opis:
    In this work, a new automated method for determining the substrate resistance is presented. It exploits a geometric formulation of the current streamlines between coupled structures and builds an analytical model for the substrate resistance. Both simulation and measurement data are utilized in order to show the validity of the proposed scheme. The measurement data are obtained from a fabricated test chip. The results show that the proposed method succeeds in computing the substrate resistance while the average error falls within 5%.
    Źródło:
    International Journal of Microelectronics and Computer Science; 2011, 2, 3; 81-87
    2080-8755
    2353-9607
    Pojawia się w:
    International Journal of Microelectronics and Computer Science
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Mathematical and simulation modeling of dual active bridge
    Autorzy:
    Barlik, Roman
    Grzejszczak, Piotr
    Koszel, Mikołaj
    Powiązania:
    https://bibliotekanauki.pl/articles/2173709.pdf
    Data publikacji:
    2022
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    dual active bridge
    small-signal analysis
    averaged model
    transfer function
    parasitics
    PI controller
    podwójny mostek aktywny
    analiza małosygnałowa
    model uśredniony
    funkcja przenoszenia
    pasożyty
    regulator PI
    Opis:
    The paper is a structured, in-depth analysis of dual active bridge modeling. In the research new, profound dual active bridge converter (DAB) circuit model is presented. Contrary to already described idealized models, all critical elements including numerous parasitic components were described. The novelty is the consideration of a threshold voltage of diodes and transistors in the converter equations. Furthermore, a lossy model of leakage inductance in an AC circuit is also included. Based on the circuit equations, a small-signal dual active bridge converter model is described. That led to developing control of the input and output transfer function of the dual active bridge converter model. The comparison of the idealized model, circuit simulation (PLECS), and an experimental model was conducted methodically and confirmed the high compatibility of the introduced mathematical model with the experimental one. Proposed transfer functions can be used when designing control of systems containing multiple converters accelerating the design process, and accurately reproducing the existing systems, which was also reported in the paper.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2022, 70, 5; art. no. e142653
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-5 z 5

      Ta witryna wykorzystuje pliki cookies do przechowywania informacji na Twoim komputerze. Pliki cookies stosujemy w celu świadczenia usług na najwyższym poziomie, w tym w sposób dostosowany do indywidualnych potrzeb. Korzystanie z witryny bez zmiany ustawień dotyczących cookies oznacza, że będą one zamieszczane w Twoim komputerze. W każdym momencie możesz dokonać zmiany ustawień dotyczących cookies