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Wyszukujesz frazę "hardware design" wg kryterium: Temat

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    Wyświetlanie 1-7 z 7
    Tytuł:
    A Low Power and High Performance Hardware Design for Automatic Epilepsy Seizure Detection
    Autorzy:
    Rafiammal, S. Syed
    Najumnissa, D.
    Anuradha, G.
    Mohideen, S. Kaja
    Jawahar, P. K.
    Mutalib, Syed Abdul
    Powiązania:
    https://bibliotekanauki.pl/articles/963923.pdf
    Data publikacji:
    2019
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    epilepsy detection
    system on chip
    implementation
    Quadrature Linear Discriminant Analysis
    hardware design
    seizure detection
    Opis:
    An application specific integrated design using Quadrature Linear Discriminant Analysis is proposed for automatic detection of normal and epilepsy seizure signals from EEG recordings in epilepsy patients. Five statistical parameters are extracted to form the feature vector for training of the classifier. The statistical parameters are Standardised Moment, Co-efficient of Variance, Range, Root Mean Square Value and Energy. The Intellectual Property Core performs the process of filtering, segmentation, extraction of statistical features and classification of epilepsy seizure and normal signals. The design is implemented in Zynq 7000 Zc706 SoC with average accuracy of 99%, Specificity of 100%, F1 score of 0.99, Sensitivity of 98% and Precision of 100 % with error rate of 0.0013/hr., which is approximately zero false detection.
    Źródło:
    International Journal of Electronics and Telecommunications; 2019, 65, 4; 707-712
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Digital control system design for bearingless permanent magnet synchronous motors
    Autorzy:
    Sun, X.
    Shi, Z.
    Yang, Z.
    Wang, S.
    Su, B.
    Chen, L.
    Li, K.
    Powiązania:
    https://bibliotekanauki.pl/articles/202311.pdf
    Data publikacji:
    2018
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    BPMSMs
    cyfrowy system kontroli
    podwójnie zamknięty system regulacji prędkości
    projektowanie oprogramowania
    projekt sprzętu
    digital control system
    double-closed speed regulating system
    software design
    hardware design
    Opis:
    This study investigates a digital control system which is used in bearingless permanent magnet synchronous motors (BPMSMs). Compared with traditional permanent magnet synchronous motors, a BPMSM is characterized by higher speed and no mechanic friction. Therefore, the application value of the latter to the special area is higher than that of the former. An analysis from previous work on the BPMSM had proved its feasibility, and some performances such as suspension force, inductance and so on were also investigated. Based on this analysis, this study focuses on solving control problems in practical applications by designing a control system. The control system design includes overall schematic, hardware and software designs. Main software systems, including the force/current transform module and closed loop control module for radial displacement, are analyzed. Interface circuit for radial displacement, current feedback circuit and dead zone protection circuit are designed for the hardware system. Finally, several performance experiments have been conducted to verify the effectiveness of the designed digital control system. Experiment results indicate that the rotor has unique characteristics, such as stable suspension performance, good start-of-suspension performance, and rapid anti-disturbance features.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2018, 66, 5; 687-698
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Adaptive and Evolvable Hardware and Systems: The State of the Art and the Prospectus for Future Development
    Autorzy:
    Negoita, M. G.
    Sekanina, L.
    Stoica, A.
    Powiązania:
    https://bibliotekanauki.pl/articles/385007.pdf
    Data publikacji:
    2009
    Wydawca:
    Sieć Badawcza Łukasiewicz - Przemysłowy Instytut Automatyki i Pomiarów
    Tematy:
    Evolvable Hardware (EHW)
    evolutionary design
    reconfigurable hardware
    FieldProgrammable Analogue Arrays (FPAA)
    Opis:
    This paper is an overview on the Evolvable Hardware (EHW) - the exciting and rapidly expanding industrial application area of the Evolutionary Computing (EC), of the Genetic Algorithms especially. The content of the work has the following structure: the first part includes generalities on industrial applications of EC, and the importance of EHW in this frame; the second part presents the outstanding technological support making possible the implementation of system adaptation in hardware. Different kind of programmable circuits arrays are introduced. The third part tackles the most known EC based methods for EHW implementation; the fourth part deals with some concrete elements of the EHW design, including the current limits in evolutionary design of digital circuits. The last part is focused on some concluding remarks with regard to future perspectives of the area. A list of references used in this work was inserted at the end.
    Źródło:
    Journal of Automation Mobile Robotics and Intelligent Systems; 2009, 3, 2; 70-75
    1897-8649
    2080-2145
    Pojawia się w:
    Journal of Automation Mobile Robotics and Intelligent Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Hardware-software platform for integrated circuit technology learning and design via Internet
    Autorzy:
    Nelayev, V. V.
    Najbuk, M.
    Breczko, T.
    Powiązania:
    https://bibliotekanauki.pl/articles/384638.pdf
    Data publikacji:
    2011
    Wydawca:
    Sieć Badawcza Łukasiewicz - Przemysłowy Instytut Automatyki i Pomiarów
    Tematy:
    e-learning
    internet
    CVS
    design
    hardware
    software
    Opis:
    The module GUI (Graphical User Interface)-SUPREM III for design and training of microelectronic technology via Internet is described. The module is the part of the software-hardware suit intended both for studying principles of design in computer integrated circuit technology, and for simulation/design of a technological route of integrated circuit manufacturing. Program package SUPREM III is the base platform for physical simulation of processes in microelectronics. Modern information technologies (the server Apache, programming languages PHP and PERL, standard GnuPlot program) are utilized for realisation of the described platform. The module is used at Belarusian universities and abroad during lectures and computer training classes as part of disciplines dedicated to design in microelectronics.
    Źródło:
    Journal of Automation Mobile Robotics and Intelligent Systems; 2011, 5, 4; 27-29
    1897-8649
    2080-2145
    Pojawia się w:
    Journal of Automation Mobile Robotics and Intelligent Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Lightweight PUF-Based Gate Replacement Technique to Reduce Leakage of Information through Power Profile Analysis
    Autorzy:
    Mohankumar, N.
    Jayakumar, M.
    Nirmala, Devi M.
    Powiązania:
    https://bibliotekanauki.pl/articles/2200703.pdf
    Data publikacji:
    2022
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    Design for Security
    Hardware Security
    PUF
    TRNG
    Wave Dynamic Differential Logic
    Opis:
    The major challenge faced by electronic device designers is to defend the system from attackers and malicious modules called Hardware Trojans and to deliver a secured design. Although there are many cryptographic preventive measures in place adversaries find different ways to attack the device. Differential Power Analysis (DPA) attack is a type of Side Channel Attacks, used by an attacker to analyze the power leakage in the circuit, through which the functionality of the circuit is extracted. To overcome this, a lightweight approach is proposed in this paper using, Wave Dynamic Differential Logic (WDDL) technique, without incurring any additional resource cost and power. The primary objective of WDDL is to make the power consumption constant of an entire circuit by restricting the leakage power. The alternate strategy used by an adversary is to leak the information through reverse engineering. The proposed work avoids this by using a bit sequencer and a modified butterfly PUF based randomizing architecture. A modified version of butterfly PUF is also proposed in this paper, and from various qualitative tests performed it is evident that this PUF can prevent information leakage. This work is validated on ISCAS 85, ISCAS 89 benchmark circuits and the results obtained indicate that the difference in leakage power is found to be very marginal.
    Źródło:
    International Journal of Electronics and Telecommunications; 2022, 68, 4; 749--754
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Verilog – ams model of comb-drive sensing element of integrated capacitive microaccelerometer for behavioral level of computer aid design
    Autorzy:
    Holovatyy, A.
    Teslyuk, V.
    Lobur, M.
    Powiązania:
    https://bibliotekanauki.pl/articles/411193.pdf
    Data publikacji:
    2014
    Wydawca:
    Polska Akademia Nauk. Oddział w Lublinie PAN
    Tematy:
    micro-electro-mechanical systems
    MEMS
    micromachining technologies
    micromechanical comb-drive sensing element
    integrated capacitive microaccelerometer
    acceleration
    SMASH
    Verilog-AMS hardware description language
    computer-aided design
    Opis:
    The article presents Verilog – AMS model of the comb-drive sensing element of the integrated capacitive microaccelerometer. The suggested model allows to simulate the reaction of the sensing element effected by the applied force of acceleration, changes of its comb-drive capacities, output voltages and currents for determining its constructive parameters and for analysis of the mechanical module of the integrated device at the behavioral level of computer-aided design.
    Źródło:
    ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes; 2014, 3, 4; 49-53
    2084-5715
    Pojawia się w:
    ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    VHDL-Ams Model of the Integrated Membrane Micro-Accelerometer with Delta-Sigma (Δσ) Analog-To-Digital Converter for Schematic Design Level
    Autorzy:
    Golovatyj, А.
    Teslyuk, V.
    Kryvyy, R.
    Powiązania:
    https://bibliotekanauki.pl/articles/411400.pdf
    Data publikacji:
    2015
    Wydawca:
    Polska Akademia Nauk. Oddział w Lublinie PAN
    Tematy:
    Micro-Electro-Mechanical Systems (MEMS)
    micromechanical sensitive element
    integrated membrane micro-accelerometer
    delta-sigma modulation
    pulse width modulation (PWM)
    delta-sigma analog-todigital converter (ADC)
    one bit digital-to-analog converter (DAC)
    VHDL-AMS hardware description language
    hAMSter software
    schemotechnical design level
    Opis:
    VHDL-Ams model of integrated membrane type micro-accelerometer with delta-sigma (ΔΣ) analog-to-digital converter for schematic design level was developed. It allows simulating movement of the sensitive element working weigh from the applied acceleration, differential capacitor and original signal capacity change, signal digitizing with the help of DeltaSigma ADC with defined micro-accelerometer structural parameters, and analyzze an integrated device at the schemotechnical design level.
    Źródło:
    ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes; 2015, 4, 2; 65-70
    2084-5715
    Pojawia się w:
    ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-7 z 7

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