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Wyszukujesz frazę "compact design" wg kryterium: Temat

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    Wyświetlanie 1-6 z 6
    Tytuł:
    Evolution of the extruder screw-disk plasticizing system construction
    Autorzy:
    Rydzkowski, T.
    Michalska-Pożoga, I.
    Szczepanek, M.
    Thakur, V.
    Powiązania:
    https://bibliotekanauki.pl/articles/27315955.pdf
    Data publikacji:
    2018
    Wydawca:
    STE GROUP
    Tematy:
    przetwarzanie materiałów i kompozytów polimerowych
    wytłaczarka śrubowo-tarczowa
    system plastyfikujący z jednym stożkiem
    system plastyfikujący z podwójnym stożkiem
    zwarta konstrukcja
    processing of polymer materials and composites
    screw-disk extruder
    single-cone plasticizing system
    double-cone plasticizing system
    compact design
    Opis:
    The search for new polymer processing ways has become necessary due to the rapidly growing technology and market needs. The time of manufacturing products, as well as the impact of process parameters and the design itself on the properties of materials have become very important. Therefore, the creation of assumptions allowing the construction of a compact device whose construction will allow, for example, high process efficiency at low screw rotational speeds or a high degree of material homogenisation, is expected by the market. However, this requires the design of new or continuous modifications and improvements to existing structures.
    Źródło:
    New Trends in Production Engineering; 2018, 1, 1; 539-544
    2545-2843
    Pojawia się w:
    New Trends in Production Engineering
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    A Novel Structure and Design Optimization of Compact Spline-Parameterized UWB Slot Antenna
    Autorzy:
    Koziel, S.
    Bekasiewicz, A.
    Powiązania:
    https://bibliotekanauki.pl/articles/221205.pdf
    Data publikacji:
    2016
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    compact antennas
    computer-aided design (CAD)
    EM-driven design
    UWB antennas
    slot antennas
    surrogate-based optimization
    Opis:
    In this paper, a novel structure of a compact UWB slot antenna and its design optimization procedure has been presented. In order to achieve a sufficient number of degrees of freedom necessary to obtain a considerable size reduction rate, the slot is parameterized using spline curves. All antenna dimensions are simultaneously adjusted using numerical optimization procedures. The fundamental bottleneck here is a high cost of the electromagnetic (EM) simulation model of the structure that includes (for reliability) an SMA connector. Another problem is a large number of geometry parameters (nineteen). For the sake of computational efficiency, the optimization process is therefore performed using variable-fidelity EM simulations and surrogate-assisted algorithms. The optimization process is oriented towards explicit reduction of the antenna size and leads to a compact footprint of 199 mm2 as well as acceptable matching within the entire UWB band. The simulation results are validated using physical measurements of the fabricated antenna prototype.
    Źródło:
    Metrology and Measurement Systems; 2016, 23, 4; 637-643
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Design Optimization and Trade-Offs of Miniaturized Wideband Antenna for Internet of Things Applications
    Autorzy:
    ul Haq, M. A.
    Kozieł, S.
    Powiązania:
    https://bibliotekanauki.pl/articles/220987.pdf
    Data publikacji:
    2017
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    compact antennas
    internet of things (IoT)
    communication devices
    numerical optimization
    footprint-reduction-oriented design
    Opis:
    Internet of Things (IoT) will play an important role in modern communication systems. Thousands of devices will talk to each other at the same time. Clearly, smart and efficient hardware will play a vital role in the development of IoT. In this context, the importance of antennas increases due to them being essential parts of communication networks. For IoT applications, a small size with good matching and over a wide frequency range is preferred to ensure reduced size of communication devices. In this paper, we propose a structure and discuss design optimization of a wideband antenna for IoT applications. The antenna consists of a stepped-impedance feed line, a rectangular radiator and a ground plane. The objective is to minimize the antenna footprint by simultaneously adjusting all geometry parameters and to maintain the electrical characteristic of antenna at an acceptable level. The obtained design exhibits dimensions of only 3.7 mm × 11.8 mm and a footprint of 44 mm2, an omnidirectional radiation pattern, and an excellent pattern stability. The proposed antenna can be easily handled within compact communication devices. The simulation results are validated through measurements of the fabricated antenna prototype.
    Źródło:
    Metrology and Measurement Systems; 2017, 24, 3; 463-471
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Computationally Efficient Two-Objective Optimization of Compact Microwave Couplers through Corrected Domain Patching
    Autorzy:
    Kozieł, S.
    Bekasiewicz, A.
    Powiązania:
    https://bibliotekanauki.pl/articles/221065.pdf
    Data publikacji:
    2018
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    computer-aided design
    compact circuits
    microwave couplers
    multi-objective optimization
    domain patching
    surrogate modelling
    response correction
    Opis:
    Finding an acceptable compromise between various objectives is a necessity in the design of contemporary microwave components and circuits. A primary reason is that most objectives are at least partially conflicting. For compact microwave structures, the design trade-offs are normally related to the circuit size and its electrical performance. In order to obtain comprehensive information about the best possible trade-offs, multi-objective optimization is necessary that leads to identifying a Pareto set. Here, a framework for fast multi-objective design of compact micro-strip couplers is discussed. We use a sequential domain patching (SDP) algorithm for numerically efficient handling of the structure bandwidth and the footprint area. Low cost of the process is ensured by executing SDP at the low-fidelity model level. Due to its bi-objective implementation, SDP cannot control the power split error of the coupler, the value of which may become unacceptably high along the initial Pareto set. Here, we propose a procedure for correction of the S-parameters’ characteristics of Pareto designs. The method exploits gradients of power split and bandwidth estimated using finite differentiation at the patch centres. The gradient data are used to correct the power split ratio while leaving the operational bandwidth of the structure at hand intact. The correction does not affect the computational cost of the design process because perturbations are pre-generated by SDP. The final Pareto set is obtained upon refining the corrected designs to the high-fidelity EM model level. The proposed technique is demonstrated using two compact microstrip rat-race couplers. Experimental validation is also provided.
    Źródło:
    Metrology and Measurement Systems; 2018, 25, 1; 139-157
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Analog Circuits Sizing Using the Fixed Point Iteration Algorithm with Transistor Compact Models
    Autorzy:
    Javid, F.
    Iskander, R.
    Durbin, F.
    Louerat, M.-M.
    Powiązania:
    https://bibliotekanauki.pl/articles/398025.pdf
    Data publikacji:
    2012
    Wydawca:
    Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
    Tematy:
    IP analogowe
    design reuse
    graf dwudzielny
    model tranzystora
    migracja technologii
    analog IP
    analog sizing
    bipartite graphs
    transistor compact models
    technology migration
    Opis:
    This paper presents an algorithm, based on the fixed point iteration, to solve for sizes and biases using transistor compact models such as BSIM3v3, BSIM4, PSP and EKV. The proposed algorithm simplifies the implementation of sizing and biasing operators. Sizing and biasing operators were originally proposed in the hierarchical sizing and biasing methodology [1]. They allow to compute transistors sizes and biases based on transistor compact models, while respecting the designer's hypotheses. Computed sizes and biases are accurate, and guarantee the correct electrical behavior as expected by the designer. Sizing and biasing operators interface with a Spice-like simulator, allowing possible use of all available compact models for circuit sizing and biasing over different technologies. A bipartite graph , that contains sizing and biasing operators, is associated to the design view of a circuit, it is the design procedure for the given circuit. To illustrate the effectiveness of the proposed fixed point algorithm, a folded cascode OTA is efficiently sized with a 130nm process, then migrated to a 65nm technology. Both sizing and migration are performed in a few milliseconds.
    Źródło:
    International Journal of Microelectronics and Computer Science; 2012, 3, 1; 7-14
    2080-8755
    2353-9607
    Pojawia się w:
    International Journal of Microelectronics and Computer Science
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Wyzwania i zagrożenia w kształtowaniu intensywnej zabudowy jednorodzinnej. Studium przypadków zabudowy szeregowej oraz czworaczej
    Challenges and threats in compact single-family housing design. Case studies of terraced housing and ‘fours-houses’
    Autorzy:
    Bradecki, Tomasz
    Powiązania:
    https://bibliotekanauki.pl/articles/1848232.pdf
    Data publikacji:
    2021
    Wydawca:
    PWB MEDIA Zdziebłowski
    Tematy:
    zabudowa intensywna
    zabudowa mieszkaniowa
    zabudowa jednorodzinna
    zabudowa szeregowa
    zabudowa czworacza
    kształtowanie
    wskaźnik urbanistyczny
    gęstość zabudowy
    compact housing
    residential buildings
    single-family housing
    terraced house
    fours-houses
    design solution
    urban indicator
    housing density
    Opis:
    Intensyfikacja zabudowy mieszkaniowej jest wyzwaniem w dobie postępującej urbanizacji i zmniejszających się zasobów terenu. Jednocześnie jest zagrożeniem ze względu na rozwiązania przestrzenne, jakie generuje. Poszukiwania różnych form intensywnej zabudowy mieszkaniowej często prowadzą do nietypowych rozwiązań projektowych. W artykule przedstawiono studium wybranych przykładów zabudowy jednorodzinnej (szeregowej, dwulokalowej oraz czworaczej). Celem artykułu jest ukazanie różnych form intensywnej zabudowy jednorodzinnej – ich wad i zalet oraz wartości wskaźników urbanistycznych, które te rozwiązania charakteryzują.
    Compact housing development is nowadays a challenge in the era of progressive urbanization and decreasing land resources. At the same time, it is also a threat due to the spatial solutions it generates. The search for various forms of intensive housing development often leads to unusual design solutions. The article presents a study of selected examples of single-family housing (terraced, two-room and quadruple). The aim of the article is to present various forms of compact single-family housing - their advantages and disadvantages as well as the values of urban indicators that characterize these solutions.
    Źródło:
    Builder; 2021, 25, 6; 56-60
    1896-0642
    Pojawia się w:
    Builder
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-6 z 6

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