Temat: body-biasing - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Cascode ampliﬁers with low-gain variability and gain enhancement using a body-biasing technique
Autorzy:: Pereira, N
Oliveira, L. B.
Goes, J.
Oliveira, J. P.
Powiązania:: https://bibliotekanauki.pl/articles/398063.pdf
Data publikacji:: 2013
Wydawca:: Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:: ampliﬁer
body-biasing
cascode
CMOS analog circuits
PVT compensation
wzmacniacz
kaskoda
układy analogowe CMOS
kompensacja PVT
Opis:: This paper presents a simple circuit technique to reduce gain variability with PVT variations in cascode ampliﬁers using a body-biasing scheme, while enhancing the overall gain of the ampliﬁer. Simulation results of a standard telescopic-cascode ampliﬁer, in two different nanoscale CMOS technologies (130 nm and 65 nm) show that the proposed compensated circuit ampliﬁer exhibits a (DC) gain variability smaller (below ± 0.5 dB) than the original (uncompensated) circuit, while reaching a gain enhancement of about 3 dB. The required auxiliary biasing circuit dissipates around 5% of the main ampliﬁer circuit.
Źródło:: International Journal of Microelectronics and Computer Science; 2013, 4, 3; 98-102
2080-8755
2353-9607
Pojawia się w:: International Journal of Microelectronics and Computer Science
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 2.

Tytuł:: Special size effects in advanced single-gate and multiple-gate SOI transistors
Autorzy:: Ohata, A.
Ritzenthaler, R.
Faynot, O.
Cristoloveanu, S.
Powiązania:: https://bibliotekanauki.pl/articles/308994.pdf
Data publikacji:: 2007
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: MOSFET
SOI
ultra-thin silicon
multiple-gate
mobility
coupling effect
thin gate oxide
gate-induced floating body effect
drain-induced virtual substrate biasing
Opis:: State-of-the-art SOI transistors require a very small body. This paper examines the effects of body thinning and thin-gate oxide in SOI MOSFETs on their electrical characteristics. In particular, the influence of film thickness on the interface coupling and carrier mobility is discussed. Due to coupling, the separation between the front and back channels is difficult in ultra-thin SOI MOSFETs. The implementation of the front-gate split C-V method and its limitations for determining the front- and back-channel mobility are described. The mobility in the front channel is smaller than that in the back channel due to additional Coulomb scattering. We also discuss the 3D coupling effects that occur in FinFETs with triple-gate and omega-gate configurations. In low-doped or tall fins the corner effect is suppressed. Narrow devices are virtually immune to substrate effects due to a strong lateral coupling between the two lateral sides of the gate. Short-channel effects are drastically reduced when the lateral coupling screens the drain influence.
Źródło:: Journal of Telecommunications and Information Technology; 2007, 2; 14-24
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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