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Wyszukujesz frazę "analog integrated circuits" wg kryterium: Temat

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    Wyświetlanie 1-5 z 5
    Tytuł:
    The Impact of Noise and Mismatch on SAR ADCs and a Calibratable Capacitance Array Based Approach for High Resolutions
    Autorzy:
    Mueller, J. H.
    Strache, S.
    Busch, L.
    Wunderlich, R.
    Heinen, S.
    Powiązania:
    https://bibliotekanauki.pl/articles/226396.pdf
    Data publikacji:
    2013
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog-digital conversion
    analog-digital integrated circuits
    calibration
    CMOS integrated circuits
    mathematical model
    MATLAB
    mixed analog digital integrated circuits
    noise
    numerical simulation
    prediction methods
    Opis:
    This paper describes widely used capacitor structures for charge-redistribution (CR) successive approximation register (SAR) based analog-to-digital converters (ADCs) and analyzes their linearity limitations due to kT/C noise, mismatch and parasitics. Results of mathematical considerations and statistical simulations are presented which show that most widespread dimensioning rules are overcritical. For high-resolution CR SAR ADCs in current CMOS technologies, matching of the capacitors, influenced by local mismatch and parasitics, is a limiting factor. For high-resolution medium-speed CR SAR ADCs, a novel capacitance array based approach using in-field calibration is proposed. This architecture promises a high resolution with small unit capacitances and without expensive factory calibration as laser trimming.
    Źródło:
    International Journal of Electronics and Telecommunications; 2013, 59, 2; 161-167
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Low-noise micro-power chopper amplifier for MEMS gas sensor
    Autorzy:
    Nebhen, J.
    Meillere, S.
    Masmoudi, M.
    Seguin, J.-L.
    Barthelemy, H.
    Aguir, K.
    Powiązania:
    https://bibliotekanauki.pl/articles/397694.pdf
    Data publikacji:
    2011
    Wydawca:
    Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
    Tematy:
    czujnik gazu
    niskie szumy
    analogowy układ scalony
    gas sensor
    low-noise
    low-power
    chopper modulation
    analog integrated circuits
    Opis:
    In this paper, a low-noise, low-power and low voltage Chopper Stabilized CMOS Amplifier (CHS-A) is presented and simulated using transistor model parameters of the AMS 0.35 μm CMOS process. This CHS-A is dedicated to high resistive gas sensor detection. The proposed CHS-A using Chopper Stabilization technique (CHS) exhibits an equivalent input referred noise of only 0.194 nV/√Hz for a chopping frequency of 210 kHz under ۫.25 V supply voltage and 26.5 dB voltage gain. The inband PSRR is above 90 and the CMRK exceeds 120 dB. At the same simulation condition, the total power consumption is 5 μW only.
    Źródło:
    International Journal of Microelectronics and Computer Science; 2011, 2, 4; 146-155
    2080-8755
    2353-9607
    Pojawia się w:
    International Journal of Microelectronics and Computer Science
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Versatile low-output-resistance low-voltage current-to-voltage analog converter
    Autorzy:
    Wojtyna, R.
    Powiązania:
    https://bibliotekanauki.pl/articles/397867.pdf
    Data publikacji:
    2016
    Wydawca:
    Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
    Tematy:
    CMOS analog integrated circuits
    low-voltage signal processing
    current to voltage conversion
    transresistor
    układy analogowe CMOS
    układy scalone CMOS
    przetwarzanie sygnałów
    konwersja prąd na napięcie
    transrezystor
    Opis:
    The paper presents a simple low-voltage transresistor attractive for on-chip analog-signal-processing. The proposed circuit offers not only an almost rail-to-rail operation and quite good linearity of DC transfer characteristic but also reasonably low value of its output resistance. This enables a voltage mode operation even if the transresistor is loaded by a not necessarily very high loading resistance. The obtained result is due to adding to the transresistor-input-stage a simple rail-to-rail voltage follower. The presented solution is an original proposal of the author. Input stage of the transresistor is built of only 4 MOS transistors and creates a simple quasi-linear current-to-voltage convertor. Output stage of it is built of 9 MOS transistors, plays a role of a very precise atypical voltage follower. In respect of simplicity and headroom, the proposed follower is better than conventional OA-based voltage followers. Preliminary simulation results are in a good agreement with the theory presented.
    Źródło:
    International Journal of Microelectronics and Computer Science; 2016, 7, 2; 73-78
    2080-8755
    2353-9607
    Pojawia się w:
    International Journal of Microelectronics and Computer Science
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Fully Analytical Characterization of the Series Inductance of Tapered Integrated Inductors
    Autorzy:
    Passos, F.
    Fino, M. H.
    Moreno, E. R.
    Powiązania:
    https://bibliotekanauki.pl/articles/226450.pdf
    Data publikacji:
    2014
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    inductor design
    variable width integrated spiral inductor
    integrated spiral inductor
    CMOS analog circuits
    IC designing
    RF IC design
    Opis:
    In this paper a general method for the determination of the series inductance of polygonal tapered inductor s is presented. The value obtained can be integrated into any integrated inductor lumped element model, thus granting the overall characterization of the device and the evaluation of performance parameters such as the quality factor or the resonance frequency. In this work, the inductor is divided into several segments and the corresponding self and mutual inductances are calculated. In the end, results obtained for several working examples are compared against electromagnetic (EM) simulations are performed in order to check the validity of the model for square, hexagonal, octagonal and tapered inductors. The proposed method depends exclusively on the geometric characteristics of the inductor as well as the technological parameters. This allows its straight forward application to any inductor shape or technology.
    Źródło:
    International Journal of Electronics and Telecommunications; 2014, 60, 1; 73-77
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    VHDL-AMS Models for Current Conveyor Based Monolithic Operational Amplifiers
    Autorzy:
    Pandiev, Ivailo M.
    Powiązania:
    https://bibliotekanauki.pl/articles/398082.pdf
    Data publikacji:
    2018
    Wydawca:
    Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
    Tematy:
    analog circuits
    CCII
    CCCII
    CFOA
    integrated circuit modelling
    VHDL-AMS
    circuit simulation
    układy analogowe
    symulacja obwodowa
    Opis:
    This paper focuses on analysis and behavioral modeling of second generation positive and negative current conveyors (CCII+s, CCII‒s), as well current-controlled current conveyors (CCCIIs). On the basis of the proposed CCII+ model improved behavioral models for three-terminal and four-termi-nal monolithic CFOAs are created. The models are developed by using VHDL analog and mixed-signal (VHDL-AMS) language and the descriptions are adapted to the SystemVision (version 5.5) simulation program, which is a part of the Mentor Graphics system. The proposed models simulate static and dynamic para-meters for differential and common-mode input signals at room temperature, including the parameters input offsets, accurate input impedances, non-dominant poles at differential input signals, AC common-mode rejection, PSRR effects, output impe-dances, slew rate limiting and terminal voltage/current operating ranges. The modeling parameters are extracted for commercially available four-terminal CFOA AD844A and CCCII OPA860 by analyzing semiconductor data books or through characterization measurements. For the validation process simulation and experi-mental results for sample electronic circuits are given.
    Źródło:
    International Journal of Microelectronics and Computer Science; 2018, 9, 1; 34-46
    2080-8755
    2353-9607
    Pojawia się w:
    International Journal of Microelectronics and Computer Science
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-5 z 5

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