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Wyszukujesz frazę "NLFSR" wg kryterium: Temat


Wyświetlanie 1-3 z 3
Tytuł:
Discrete models of the NLFSR generators
Autorzy:
Walczak, J.
Stępień, R.
Powiązania:
https://bibliotekanauki.pl/articles/97459.pdf
Data publikacji:
2011
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
NLFSR generator
pseudorandom signal generators
pseudorandom number generator
Opis:
In this article a class of pseudo random signal generators, build with static nonlinear feedback block, is described. The feedback block function is modeled as a linear combination of sums and products of the register’s taps. A discrete model of the generator is proposed as a nonlinear discrete circuit. The simulation results from Matlab-Simulink and Multisim are shown. Also an experimental results of the example generator on FPGA implementation is shown.
Źródło:
Computer Applications in Electrical Engineering; 2011, 9; 181-189
1508-4248
Pojawia się w:
Computer Applications in Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Scalable Method of Searching for Full-period Nonlinear Feedback Shift Registers with GPGPU : New List of Maximum Period NLFSRs
Autorzy:
Augustynowicz, P.
Kanciak, K.
Powiązania:
https://bibliotekanauki.pl/articles/226184.pdf
Data publikacji:
2018
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
NLFSR
GPGPU
CUDA
Nonlinear Feedback Shift Registers
de Bruijn sequences
Opis:
This paper addresses the problem of efficient searching for Nonlinear Feedback Shift Registers (NLFSRs) with a guaranteed full period. The maximum possible period for an n-bit NLFSR is 2ⁿ - 1 (an all-zero state is omitted). A multi-stages hybrid algorithm which utilizes Graphics Processor Units (GPU) power was developed for processing data-parallel throughput computation. Usage of the abovementioned algorithm allows giving an extended list of n-bit NLFSR with maximum period for 7 cryptographically applicable types of feedback functions.
Źródło:
International Journal of Electronics and Telecommunications; 2018, 64, 2; 167-171
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Using SAT Solvers to Finding Short Cycles in Cryptographic Algorithms
Autorzy:
Dudzic, Władysław
Kanciak, Krzysztof
Powiązania:
https://bibliotekanauki.pl/articles/226471.pdf
Data publikacji:
2020
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
NLFSR
short cycles
stream ciphers
Trivium
Bivium
Grain-80
Grain-128
Opis:
A desirable property of iterated cryptographic algorithms, such as stream ciphers or pseudo-random generators, is the lack of short cycles. Many of the previously mentioned algorithms are based on the use of linear feedback shift registers (LFSR) and nonlinear feedback shift registers (NLFSR) and their combination. It is currently known how to construct LFSR to generate a bit sequence with a maximum period, but there is no such knowledge in the case of NLFSR. The latter would be useful in cryptography application (to have a few taps and relatively low algebraic degree). In this article, we propose a simple method based on the generation of algebraic equations to describe iterated cryptographic algorithms and find their solutions using an SAT solver to exclude short cycles in algorithms such as stream ciphers or nonlinear feedback shift register (NLFSR). Thanks to the use of AIG graphs, it is also possible to fully automate our algorithm, and the results of its operation are comparable to the results obtained by manual generation of equations. We present also the results of experiments in which we successfully found short cycles in the NLFSRs used in Grain-80, Grain-128 and Grain-128a stream ciphers and also in stream ciphers Bivium and Trivium (without constants used in the initialization step).
Źródło:
International Journal of Electronics and Telecommunications; 2020, 66, 3; 443-448
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-3 z 3

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