Informacja

Drogi użytkowniku, aplikacja do prawidłowego działania wymaga obsługi JavaScript. Proszę włącz obsługę JavaScript w Twojej przeglądarce.

Wyszukujesz frazę "MOS technology" wg kryterium: Temat


Wyświetlanie 1-4 z 4
Tytuł:
Advanced compact modeling of the deep submicron technologies
Autorzy:
Grabiński, W.
Bucher, M.
Sallese, J.-M.
Krummenacher, F.
Powiązania:
https://bibliotekanauki.pl/articles/309312.pdf
Data publikacji:
2000
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
ultra deep submicron (UDSM) technology
compact modeling
EKV MOS transistor model
MOSFET
matching
low power
RF applications
Opis:
The technology of CMOS large-scale integrated circuits (LSI's) achieved remarkable advances over last 25 year and the progress is expected to continue well into the next century. The progress has been driven by the downsizing of the active devices such as MOSFETs. Approaching these dimensions, MOSFET characteristics cannot be accurately predicted using classical modeling methods currently used in the most common MOSFET models such as BSIM, MM9 etc, without introducing large number of empirical parameters. Various physical effects that needed to be considered while modeling UDSM devices: quantization of the inversion layer, mobility degradation, carrier velocity saturation and overshoot, polydepletion effects, bias dependent source/drain resistances and capacitances, vertical and lateral doping profiles, etc. In this paper, we will discuss the progress in the CMOS technology and the anticipated difficulties of the sub-0.25 žm LSI downsizing. Subsequently, basic MOSFET modeling methodologies that are more appropriate for UDSM MOSFETs will be presented as well. The advances in compact MOSFET devices will be illustrated using application examples of the EPFL EKV model
Źródło:
Journal of Telecommunications and Information Technology; 2000, 3-4; 31-42
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Properties of PVD coatings manufactured on X38CrMoV5-1 steel for plastic moulding applications
Autorzy:
Gołąbczak, M.
Pawlak, W.
Szymański, W.
Jacquet, P.
Fliti, R.
Powiązania:
https://bibliotekanauki.pl/articles/100117.pdf
Data publikacji:
2012
Wydawca:
Wrocławska Rada Federacji Stowarzyszeń Naukowo-Technicznych
Tematy:
X38CrMoV5-1 steel
PVD technology
TiC+a-C:H coating
MoS2TiW coating
friction coefficient
nanohardness
Opis:
In plastics moulding industry a lot of parts sustain in relative movement: ejectors, slides, dies, etc. Some seizing or micro-welding may appear, especially when lubrication is not used. In this paper, PVD coatings have been obtained thanks to hybrid Cathodic Arc Evaporation system. Several properties of the coatings have been investigated such as chemical composition, microstructure, friction coefficient at ambient and high temperature conditions, nanohardness and their modulus of elasticity.
Źródło:
Journal of Machine Engineering; 2012, 12, 2; 37-45
1895-7595
2391-8071
Pojawia się w:
Journal of Machine Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Ultra-shallow nitrogen plasma implantation for ultra-thin silicon oxynitride (SiOxNy) layer formation
Autorzy:
Bieniek, T.
Beck, R. B.
Jakubowski, A.
Kudła, A.
Powiązania:
https://bibliotekanauki.pl/articles/308830.pdf
Data publikacji:
2005
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
MOS technology
plasma processing
shallow implantation
radiation damage
Opis:
The radiation damage caused by low energy r.f. plasmas has not been, to our knowledge, studied so far in the case of symmetric planar plasma reactors that are usually used for PECVD processes. The reason is that, unlike nonsymmetrical RIE reactors, such geometry prevents, basically, high-energy ion bombardment of the substrate. In this work, we present the results of experiments in which we have studied the influence of plasma processing on the state of silicon surface. Very low temperature plasma oxidation has been used as a test of silicon surface condition. The obtained layers were then carefully measured by spectroscopic ellipsometry, allowing not only the thickness to be determined accurately, but also the layer composition to be evaluated. Different plasma types, namely N2, NH3 and Ar, were used in the first stage of the experiment, allowing oxidation behaviour caused by the exposure to those plasma types to be compared in terms of relative differences. It has been clearly proved that even though the PECVD system is believed to be relatively safe in terms of radiation damage, in the case of very thin layer processing (e.g., ultra-thin oxynitride layers) the effects of radiation damage may considerably affect the kinetics of the process and the properties of the formed layers.
Źródło:
Journal of Telecommunications and Information Technology; 2005, 1; 70-75
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Ultrathin oxynitride films for CMOS technology
Autorzy:
Beck, R.B.
Jakubowski, A.
Powiązania:
https://bibliotekanauki.pl/articles/308025.pdf
Data publikacji:
2004
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
MOS technology
gate stack
ultrathin oxynitride layers
high temperature processing
plasma processing
Opis:
In this work, a review of possible methods of oxynitride film formation will be given. These are different combinations of methods applying high-temperature oxidation and nitridation, as well as ion implantation and deposition techniques. The layers obtained using these methods differ, among other aspects in: nitrogen content, its profile across the ultrathin layer,... etc., which have considerable impact on device properties, such as leakage current, channel mobility, device stability and its reliability. Unlike high-temperature processes, which (understood as a single process step) usually do not allow the control of the nitrogen content at the silicon-oxynitride layer interface, different types of deposition techniques allow certain freedom in this respect. However, deposition techniques have been believed for many years not to be suitable for such a responsible task as the formation of gate dielectrics in MOS devices. Nowadays, this belief seems unjustified. On the contrary, these methods often allow the formation of the layers not only with a uniquely high content of nitrogen but also a very unusual nitrogen profile, both at exceptionally low temperatures. This advantage is invaluable in the times of tight restrictions imposed on the thermal budget (especially for high performance devices). Certain specific features of these methods also allow unique solutions in certain technologies (leading to simplifications of the manufacturing process and/or higher performance and reliability), such as dual gate technology for system-on-chip (SOC) manufacturing.
Źródło:
Journal of Telecommunications and Information Technology; 2004, 1; 62-69
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-4 z 4

    Ta witryna wykorzystuje pliki cookies do przechowywania informacji na Twoim komputerze. Pliki cookies stosujemy w celu świadczenia usług na najwyższym poziomie, w tym w sposób dostosowany do indywidualnych potrzeb. Korzystanie z witryny bez zmiany ustawień dotyczących cookies oznacza, że będą one zamieszczane w Twoim komputerze. W każdym momencie możesz dokonać zmiany ustawień dotyczących cookies