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Wyszukujesz frazę "III-V semiconductor" wg kryterium: Temat


Wyświetlanie 1-3 z 3
Tytuł:
Low-temperature growth of InAs/GaSb superlattices on miscut GaAs substrates for mid-wave infrared detectors
Autorzy:
Martyniuk, Piotr
Benyahia, Djalal
Powiązania:
https://bibliotekanauki.pl/articles/2204216.pdf
Data publikacji:
2023
Wydawca:
Polska Akademia Nauk. Stowarzyszenie Elektryków Polskich
Tematy:
molecular beam epitaxy
superlattice
X-ray diffraction
III-V semiconductor
Opis:
Short-period 10 monolayers InAs/10ML GaSb type-II superlattices have been deposited on a highly lattice-mismatched GaAs (001), 2° offcut towards <110> substrates by molecular beam epitaxy. This superlattice was designed for detection in the mid-wave infrared spectral region (cut-off wavelength, λcut-off = 5.4 μm at 300 K). The growth was performed at relatively low temperatures. The InAs/GaSb superlattices were grown on a GaSb buffer layer by an interfacial misfit array in order to relieve the strain due to the ~7.6% lattice-mismatch between the GaAs substrate and type-II superlattices. The X-ray characterisation reveals a good crystalline quality exhibiting full width at half maximum ~100 arcsec of the zero-order peak. Besides, the grown samples have been found to exhibit a change in the conductivity.
Źródło:
Opto-Electronics Review; 2023, 31, Special Issue; art. no. e144557
1230-3402
Pojawia się w:
Opto-Electronics Review
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Sensor performance and cut-off wavelength tradeoffs of III-V focal plane arrays
Autorzy:
James, Jonathan Ch.
Haran, Terence L.
Lane, Sarah E.
Powiązania:
https://bibliotekanauki.pl/articles/2204205.pdf
Data publikacji:
2023
Wydawca:
Polska Akademia Nauk. Stowarzyszenie Elektryków Polskich
Tematy:
infrared focal plane arrays
III-V semiconductor infrared detector technologies
infrared sensor performance modelling
infrared sensor design
mid-wave and longwave infrared sensors
Opis:
Infrared detector technologies engineered from III-V semiconductors such as strained-layer superlattice, quantum well infrared photodetectors, and quantum dot infrared photodetectors provide additional flexibility to engineer bandgap or spectral response cut-offs compared to the historical high-performance detector technology of mercury/cadmium/telluride. The choice of detector cut-off depends upon the sensing application for which the system engineer is attempting to maximize performance within an expected ensemble of operational scenarios that define objects or targets to be detected against specific environmental backgrounds and atmospheric conditions. Sensor performance is typically characterised via one or more metrics that can be modelled or measured experimentally. In this paper, the authors will explore the impact of detector cut-off wavelength with respect to different performance metrics such as noise equivalent temperature difference and expected target detection or identification ranges using analytical models developed for several representative sensing applications encompassing a variety of terrestrial atmospheric conditions in the mid-wave and long-wave infrared wavelength bands. The authors will also report on their review of recently published literature concerning the relationships between cut-off wavelength and the other detector performance characteristics such as quantum efficiency or dark current for a variety of detector technologies.
Źródło:
Opto-Electronics Review; 2023, 31, Special Issue; art. no. e144570
1230-3402
Pojawia się w:
Opto-Electronics Review
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Semiconductor cleaning technology for next generation material systems
Autorzy:
Ruzyllo, J.
Powiązania:
https://bibliotekanauki.pl/articles/308761.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
III-V compounds
FinFET
IC manufacturing
MEMS
MOS gate stack
semiconductor cleaning
Opis:
This paper gives a brief overview of the challenges wafer cleaning technology is facing in the light of advanced silicon technology moving in the direction of non-planar device structures and the need for modified cleans for semiconductors other than silicon. In the former case, the key issue is related to cleaning and conditioning of vertical surfaces in next generation CMOS gate structure as well as deep 3D geometries in MEMS devices. In the latter, an accelerated pace at which semiconductors other than silicon are being introduced into the mainstream manufacturing calls for the development of material specific wafer cleaning technologies. Examples of the problems related to each challenge are considered.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 2; 44-48
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-3 z 3

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