- Tytuł:
- Automated substrate resistance extraction in nanoscale VLSI by exploiting a geometry-based analytical model
- Autorzy:
-
Bontzios, Y. I.
Dimopoulos, M. G.
Hatzopoulos, A. A. - Powiązania:
- https://bibliotekanauki.pl/articles/398110.pdf
- Data publikacji:
- 2011
- Wydawca:
- Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
- Tematy:
-
szum podłożowy
układ scalony
modelowanie geometryczne
pochodzenie oporu
modelowanie oporu
zasilanie pasożytnicze
substrate noise
integrated circuits
geometric modeling
resistance extraction
resistance modeling
parasitics - Opis:
- In this work, a new automated method for determining the substrate resistance is presented. It exploits a geometric formulation of the current streamlines between coupled structures and builds an analytical model for the substrate resistance. Both simulation and measurement data are utilized in order to show the validity of the proposed scheme. The measurement data are obtained from a fabricated test chip. The results show that the proposed method succeeds in computing the substrate resistance while the average error falls within 5%.
- Źródło:
-
International Journal of Microelectronics and Computer Science; 2011, 2, 3; 81-87
2080-8755
2353-9607 - Pojawia się w:
- International Journal of Microelectronics and Computer Science
- Dostawca treści:
- Biblioteka Nauki
Artykuł