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Wyszukujesz frazę "SiC MOSFET" wg kryterium: Temat


Wyświetlanie 1-11 z 11
Tytuł:
Experimental study of snubber circuit design for SiC power MOSFET devices
Autorzy:
Niewiara, Ł. J.
Skiwski, M.
Tarczewski, T.
Grzesiak, L. M.
Powiązania:
https://bibliotekanauki.pl/articles/97236.pdf
Data publikacji:
2015
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
DC\DC converter
snubber circuit
SiC MOSFET
Opis:
In this paper a design process of snubber circuit for DC\DC converter is presented. Computer simulation and experimental tests were carried out. Due to the presence of parasitic LC (inductance and capacitance) circuit in the power stage, it is necessary to use an additional snubber circuit for voltage overshoot and oscillations reduction. A simulation model of the converter with parasitic circuit was designed. Six topologies of snubber circuits (C, single C, RC, single RC, RCD, single RCD) were investigated in simulation tests. Simulation model of the proposed system has been investigated in Matlab/Simulink/PLECS environment. Input signal parameters like voltage overshoot, rise time, fall time were compared for considered snubber circuits. Experimental tests were carried out for the best simulation results. It confirm the proper choice of snubber circuit.
Źródło:
Computer Applications in Electrical Engineering; 2015, 13; 120-131
1508-4248
Pojawia się w:
Computer Applications in Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Computer aided design of snubber circuit for DC/DC converter with SiC power MOSFET devices
Autorzy:
Niewiara, Ł.
Skiwski, M.
Tarczewski, T.
Grzesiak, L. M.
Powiązania:
https://bibliotekanauki.pl/articles/378069.pdf
Data publikacji:
2015
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
DC\DC converter
snubber circuit
SiC MOSFET
Opis:
In this paper a computer aided design of snubber circuit for DC\DC converter is presented. Due to the presence of parasitic LC circuit in the power stage (inductance and capacitance), it is necessary to use an additional snubber circuit for voltage overshoot and oscillations reduction. A simulation model of the converter with parasitic circuit was designed. Three types of snubber circuits (C, RC, RCD) were investigated in simulation tests. Simulation model of the proposed system has been investigated in Matlab/Simulink/PLECS environment. Input signal parameters like voltage overshoot, rise time, fall time were compared for considered snubber circuits. Experimental tests were carried out for the best simulation result. It confirm the proper choice of snubber circuit.
Źródło:
Poznan University of Technology Academic Journals. Electrical Engineering; 2015, 84; 77-83
1897-0737
Pojawia się w:
Poznan University of Technology Academic Journals. Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
PMSM servo-drive fed by SiC MOSFETs based VSI
Autorzy:
Tarczewski, T.
Skiwski, M.
Grzesiak, L. M.
Zieliński, M.
Powiązania:
https://bibliotekanauki.pl/articles/1193673.pdf
Data publikacji:
2018
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
PMSM
servo-drive
SiC MOSFET
FOC control
state feedback control
Opis:
The article presents modern PMSM servo-drive with SiC MOSFETs power devices and microprocessor with ARM Cortex core. The high switching frequency is obtained due to the application of high efficient power switching components and powerful microprocessor. It allows to achieve good dynamical properties of current control loop, proper disturbance compensation and silent operation of servo-drive. Experimental tests results obtained for two different control schemes (i.e., cascade control structure and state feedback position control) are presented.
Źródło:
Power Electronics and Drives; 2018, 3, 38; 35-45
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Comparison of 4H-SiC and 6H-SiC MOSFET I-V characteristics simulated with Silvaco Atlas and Crosslight Apsys
Autorzy:
Stęszewski, J.
Jakubowski, A.
Korwin-Pawlowski, M. L.
Powiązania:
https://bibliotekanauki.pl/articles/308627.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
silicon carbide
SiC MOSFET
4H-SiC
6H-SiC
Crosslight Apsys
Silvaco Atlas
Opis:
A set of physical models describing silicon carbide with fitting parameters is proposed. The theoretical I-V output and transfer characteristics and parameters of MOS transistors were calculated using Silvaco Atlas and Crosslight Apsys semiconductor device simulation environments.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 3; 93-95
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Application of artificial bee colony algorithm to auto-tuning of state feedback controller for DC-DC power converter
Autorzy:
Tarczewski, T.
Niewiara, Ł. J.
Grzesiak, L M.
Powiązania:
https://bibliotekanauki.pl/articles/1193254.pdf
Data publikacji:
2016
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
artificial bee colony algorithm
state feedback controller
DC-DC power converter
SiC MOSFET
Opis:
The article presents an auto-tuning method of state feedback voltage controller for DC-DC power converter. The penalty matrices employed for calculation of controller’s coefficients were obtained by using nature-inspired artificial bee colony (ABC) optimization algorithm. This overcomes the main drawback of state feedback control related to time-consuming trial-and-error tuning procedure. The optimization algorithm takes into account constraints of selected state and control variables of DC-DC power converter. In order to meet all control objectives (i.e., fast voltage response and chattering-free control signal) an appropriate performance index is proposed. Proper selection of state feedback controller (SFC) coefficients is proven by simulation and experimental tests of DC-DC power converter.
Źródło:
Power Electronics and Drives; 2016, 1, 36/2; 83-96
2451-0262
2543-4292
Pojawia się w:
Power Electronics and Drives
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Problems related to the correct determination of switching power losses in high-speed SiC MOSFET power modules
Autorzy:
Zięba, Dawid
Rąbkowski, Jacek
Powiązania:
https://bibliotekanauki.pl/articles/2173649.pdf
Data publikacji:
2022
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
SiC MOSFET
power modules
channel current
switching losses
time alignment
moduł mocy
prąd kanału
straty przełączania
wyrównanie czasu
Opis:
High-speed switching capabilities of SiC MOSFET power modules allow building high power converters working with elevated switching frequencies offering high efficiencies and high power densities. As the switching processes get increasingly rapid, the parasitic capacitances and inductances appearing in SiC MOSFET power modules affect switching transients more and more significantly. Even relatively small parasitic capacitances can cause a significant capacitive current flow through the SiC MOSFET power module. As the capacitive current component in the drain current during the turn-off process is significant, a commonly used metod of determining the switching power losses based on the product of instantaneous values of drain-source voltage and drain current may lead to a severe error. Another problem is that charged parasitic capacitances discharge through the MOSFET resistive channel during the turn-on process. As this happens in the internal structure, that current is not visible on the MOSFET terminals. Fast switching processes are challenging to measure accurately due to the imperfections of measurement probes, like their output signals delay mismatch. This paper describes various problems connected with the correct determination of switching power losses in high-speed SiC MOSFET power modules and proposes solutions to these problems. A method of achieving a correct time alignment of waveforms collected by voltage and current probes has been shown and verified experimentally. In order to estimate SiC MOSFET channel current during the fast turn-off process, a method based on the estimation of nonlinear parasitic capacitances current has also been proposed and verified experimentally.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2022, 70, 2; art. no. e140695
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Selection of 5 kW Converter Leg for Power Electronic System
Autorzy:
Zygmanowski, M.
Michalak, J.
Jeleń, M.
Jarek, G.
Powiązania:
https://bibliotekanauki.pl/articles/973060.pdf
Data publikacji:
2017
Wydawca:
Stowarzyszenie Inżynierów i Techników Mechaników Polskich
Tematy:
IGBT
Silicon Carbide (SiC)
MOSFET
Inverter
Microgrid
Opis:
Three converter leg variants are analyzed for low power converter used for power electronic system for residential buildings. The two-level Si-IGBT and SiC-MOSFET converters are compared with Si-IGBT three-level T-type converter. Power losses generated in each of these converters over a predicted period of 20 years of operation are contrasted with the cost of converter options. The detailed selection procedure for output inductor is presented in this paper. This procedure shows the influence of the inductor parameters like number of turns, air gap length on its losses, cost and size. Theoretical approach is verified with simulations and experimental results.
Źródło:
Measurement Automation Monitoring; 2017, 63, 8; 282-287
2450-2855
Pojawia się w:
Measurement Automation Monitoring
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Development of 3C-SiC MOSFETs
Autorzy:
Bakowski, M.
Schöner, A.
Ericsson, P.
Strömberg, H.
Nagasawa, H.
Masayuki, A.
Powiązania:
https://bibliotekanauki.pl/articles/308791.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
vertical MOSFET
3C-SiC
channel mobility
Opis:
The paper reviews the development of the 3C-SiC MOSFETs in a unique development project combining the material and device expertise of HAST (Hoya Advanced Semiconductor Technologies) and Acreo, respectively. The motivation for the development of the 3C-SiC MOSFETs and the summary of the results from the lateral and vertical devices with varying size from single cell to 3×3 mm2 large devices are reviewed. The vertical devices had hexagonal and square unit cell designs with 2 žm and 4 žm channel length. The p-body was aluminum implanted and the source was nitrogen or phosphorus implanted. Low temperature Ti/W contacts were evaluated.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 2; 49-56
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A comparison study of the features of DC/DC systems with Si IGBT and SiC MOSFET transistors
Badania porównawcze sprawności układów DC/DC z tranzystorami Si IGBT oraz tranzystorami SiC typu MOSFET
Autorzy:
Fatyga, K.
Kwaśny, Ł.
Stefańczak, B.
Powiązania:
https://bibliotekanauki.pl/articles/408426.pdf
Data publikacji:
2018
Wydawca:
Politechnika Lubelska. Wydawnictwo Politechniki Lubelskiej
Tematy:
IGBT
SiC
transistor
MOSFET
DC/DC converter
tranzystor
przekształtnik DC/DC
Opis:
This paper presents a comparison of the efficiency of two bidirectional DC/DC converters based on dual H-bridge topology. Tested converters were built using Si-based IGBT transistors and SiC-based MOSFETs. The results of the research are efficiency characteristics, taken from tests at the frequency range of 10÷60 kHz. Analysis of the results points to a massive advantage of the SiC-based design over the Si-based one.
W artykule zaprezentowano badania porównawcze sprawności dwóch dwukierunkowych przekształtników DC/DC wykonanych w topologii podwójnego mostka H. Badane przekształtniki wykonano w technologii krzemowej z tranzystorami IGBT oraz w technologii węglika krzemu z tranzystorami SiC MOSFET. Rezultatem badań są charakterystyki sprawności uzyskane z testów przy częstotliwości pracy w zakresie 10÷60 kHz. Analiza uzyskanych wyników wskazuje na zdecydowaną przewagę rozwiązania wykonanego w technologii węglika krzemu nad rozwiązaniem z tranzystorami krzemowymi IGBT
Źródło:
Informatyka, Automatyka, Pomiary w Gospodarce i Ochronie Środowiska; 2018, 8, 2; 68-71
2083-0157
2391-6761
Pojawia się w:
Informatyka, Automatyka, Pomiary w Gospodarce i Ochronie Środowiska
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Multiparameter reliability model for SiC power MOSFET subjected to repetitive thermomechanical load
Autorzy:
Bąba, Sebastian
Powiązania:
https://bibliotekanauki.pl/articles/2173625.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
reliability engineering
reliability modelling
power MOSFET
SiC
silicon carbide
inżynieria niezawodności
modelowanie niezawodności
węglik krzemu
tranzystor mocy MOSFET
Opis:
The main drawback of any Design for Reliability methodology is lack of easy accessible reliability models, prepared individually for each critical component. In this paper, a reliability model for SiC power MOSFET in SOT – 227 B housing, subjected to power cycling, is presented. Discussion covers preparation of Accelerated Lifetime Test required to develop such reliability model, analysis of semiconductor degradation progress, samples post-failure analysis and identification of reliability model parameters. Such model may be further used for failure prognostics or useful lifetime estimation of High Performance Power Supplies.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 3; art. no. e137386
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Multiparameter reliability model for SiC power MOSFET subjected to repetitive thermomechanical load
Autorzy:
Bąba, Sebastian
Powiązania:
https://bibliotekanauki.pl/articles/2090738.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
reliability engineering
reliability modelling
power MOSFET
SiC
silicon carbide
inżynieria niezawodności
modelowanie niezawodności
węglik krzemu
tranzystor mocy MOSFET
Opis:
The main drawback of any Design for Reliability methodology is lack of easy accessible reliability models, prepared individually for each critical component. In this paper, a reliability model for SiC power MOSFET in SOT – 227 B housing, subjected to power cycling, is presented. Discussion covers preparation of Accelerated Lifetime Test required to develop such reliability model, analysis of semiconductor degradation progress, samples post-failure analysis and identification of reliability model parameters. Such model may be further used for failure prognostics or useful lifetime estimation of High Performance Power Supplies.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 3; e137386, 1--8
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-11 z 11

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