- Tytuł:
- Current conveyor equation-defined macromodels for wideband RF circuit design
- Autorzy:
-
Brinson, M.
Kuznetsov, V. - Powiązania:
- https://bibliotekanauki.pl/articles/397845.pdf
- Data publikacji:
- 2017
- Wydawca:
- Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
- Tematy:
-
Qucs
current conveyors
compact semiconductor device modelling
equation-defined devices
macromodels
Verilog-A module synthesis
konwejer prądowy
modelowanie urządzeń półprzewodnikowych
makromodele - Opis:
- A high percentage of analogue integrated circuit designs use voltage domain signal processing techniques. Given the fact that integrated circuit current conveyors are high bandwidth current processing devices, often with superior RF performance compared to comparable voltage domain devices, it is surprising that the number of current mode integrated circuits available, as standard of-the-shelf industrial items, is so small. This paper introduces equation-defined device and Verilog-A synthesis approaches to the macromodelling of current conveyor integrated circuits. To illustrate the proposed modelling techniques the properties of a number of modular behavioural level current conveyor macromodel cells are described and their performance compared. The material presented is intended for analogue device modellers and circuit designers who wish to simulate large signal current domain integrated circuit designs. It also demonstrates how synthesized Verilog-A modules can be derived from equation-defined device and conventional subcircuits to form functional, computationally efficient current conveyor macromodels. To illustrate the application of behavioural current conveyor macromodels the design of a six cell CCII+ instrumentation amplifier is introduced and its performance discussed.
- Źródło:
-
International Journal of Microelectronics and Computer Science; 2017, 8, 2; 65-71
2080-8755
2353-9607 - Pojawia się w:
- International Journal of Microelectronics and Computer Science
- Dostawca treści:
- Biblioteka Nauki
Artykuł