Autor: Bieniek, A - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Design, Modeling and Simulation of MEMS Devices on Si, SiC, and Diamond for Harsh Environment Applications
Autorzy:: Kociubiński, A.
Bieniek, T.
Janczyk, G.
Powiązania:: https://bibliotekanauki.pl/articles/1199152.pdf
Data publikacji:: 2014-06
Wydawca:: Polska Akademia Nauk. Instytut Fizyki PAN
Tematy:: 07.05.Tp
07.07.Df
62.20.-x
62.25.Fg
Opis:: Set of micromechanical (MEMS) test structures designed for fabrication on silicon, silicon carbide and diamond substrates has been successfully designed. A dedicated mask-set development has been carried along with numerical simulations performed with assistance of a dedicated design and modelling CoventorWare™ - toolset by Coventor. A set of sample simulations presented in this paper has been performed for specific simulation domains focused on silicon-alternative material reality to proof the usefulness of proposed substrates. The aim was to verify its applicability for MEMS design and confirm an outstanding performance of the resulting device which effectively opens a new area of interest for subsequent research and development efforts.
Źródło:: Acta Physica Polonica A; 2014, 125, 6; 1374-1376
0587-4246
1898-794X
Pojawia się w:: Acta Physica Polonica A
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 2.

Tytuł:: Ultra-shallow nitrogen plasma implantation for ultra-thin silicon oxynitride (SiOxNy) layer formation
Autorzy:: Bieniek, T.
Beck, R. B.
Jakubowski, A.
Kudła, A.
Powiązania:: https://bibliotekanauki.pl/articles/308830.pdf
Data publikacji:: 2005
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: MOS technology
plasma processing
shallow implantation
radiation damage
Opis:: The radiation damage caused by low energy r.f. plasmas has not been, to our knowledge, studied so far in the case of symmetric planar plasma reactors that are usually used for PECVD processes. The reason is that, unlike nonsymmetrical RIE reactors, such geometry prevents, basically, high-energy ion bombardment of the substrate. In this work, we present the results of experiments in which we have studied the influence of plasma processing on the state of silicon surface. Very low temperature plasma oxidation has been used as a test of silicon surface condition. The obtained layers were then carefully measured by spectroscopic ellipsometry, allowing not only the thickness to be determined accurately, but also the layer composition to be evaluated. Different plasma types, namely N2, NH3 and Ar, were used in the first stage of the experiment, allowing oxidation behaviour caused by the exposure to those plasma types to be compared in terms of relative differences. It has been clearly proved that even though the PECVD system is believed to be relatively safe in terms of radiation damage, in the case of very thin layer processing (e.g., ultra-thin oxynitride layers) the effects of radiation damage may considerably affect the kinetics of the process and the properties of the formed layers.
Źródło:: Journal of Telecommunications and Information Technology; 2005, 1; 70-75
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 3.

Tytuł:: Modeling, Simulation and Calibration of Silicon Wet Etching
Autorzy:: Kociubiński, A.
Duk, M.
Bieniek, T.
Janus, P.
Powiązania:: https://bibliotekanauki.pl/articles/308233.pdf
Data publikacji:: 2009
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: anisotropic wet etching
KOH
silicon technology
Opis:: The methods of parameter optimization in Etch3DTM simulator and the results of the comparison of simulations of silicon etching in KOH with experiments are presented. The aim of this study was to calibrate the tool to a set of process conditions that is offered by Institute of Electron Technology (ITE). The Taguchi approach was used to analyze the influence of every remove probability function (RPF) parameter on one or more output parameters. This allowed tuning the results of simulation to the results of real etching performed in ITE.
Źródło:: Journal of Telecommunications and Information Technology; 2009, 4; 65-70
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 4.

Tytuł:: Applying shallow nitrogen implantation from rf plasma for dual gate oxide technology
Autorzy:: Bieniek, T.
Beck, R. B.
Jakubowski, A.
Głuszko, G.
Konarski, P.
Ćwil, M.
Powiązania:: https://bibliotekanauki.pl/articles/308685.pdf
Data publikacji:: 2007
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: CMOS
dual gate oxide
gate stack
oxynitride
plasma implantation
Opis:: The goal of this work was to study nitrogen implantation from plasma with the aim of applying it in dual gate oxide technology and to examine the influence of the rf power of plasma and that of oxidation type. The obtained structures were examined by means of ellipsometry, SIMS and electrical characterization methods.
Źródło:: Journal of Telecommunications and Information Technology; 2007, 3; 3-8
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 5.

Tytuł:: Composition and electrical properties of ultra-thin SiOxNy layers formed by rf plasma nitrogen implantation/plasma oxidation processes
Autorzy:: Bieniek, T.
Beck, R. B.
Jakubowski, A.
Konarski, P.
Ćwil, M.
Hoffman, P.
Schmeißer, D.
Powiązania:: https://bibliotekanauki.pl/articles/308689.pdf
Data publikacji:: 2007
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: CMOS
gate stack
oxynitride
plasma implantation
Opis:: Experiments presented in this work are a summary of the study that examines the possibility of fabrication of oxynitride layers for Si structures by nitrogen implantation from rf plasma only or nitrogen implantation from rf plasma followed immediately by plasma oxidation process. The obtained layers were characterized by means of: ellipsometry, XPS and ULE-SIMS. The results of electrical characterization of NMOS Al-gate test structures fabricated with the investigated layers used as gate dielectric, are also discussed.
Źródło:: Journal of Telecommunications and Information Technology; 2007, 3; 9-15
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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