Autor: Niewiara, Ł. J. - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Application of artificial bee colony algorithm to auto-tuning of state feedback controller for DC-DC power converter
Autorzy:: Tarczewski, T.
Niewiara, Ł. J.
Grzesiak, L M.
Powiązania:: https://bibliotekanauki.pl/articles/1193254.pdf
Data publikacji:: 2016
Wydawca:: Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:: artificial bee colony algorithm
state feedback controller
DC-DC power converter
SiC MOSFET
Opis:: The article presents an auto-tuning method of state feedback voltage controller for DC-DC power converter. The penalty matrices employed for calculation of controller’s coefficients were obtained by using nature-inspired artificial bee colony (ABC) optimization algorithm. This overcomes the main drawback of state feedback control related to time-consuming trial-and-error tuning procedure. The optimization algorithm takes into account constraints of selected state and control variables of DC-DC power converter. In order to meet all control objectives (i.e., fast voltage response and chattering-free control signal) an appropriate performance index is proposed. Proper selection of state feedback controller (SFC) coefficients is proven by simulation and experimental tests of DC-DC power converter.
Źródło:: Power Electronics and Drives; 2016, 1, 36/2; 83-96
2451-0262
2543-4292
Pojawia się w:: Power Electronics and Drives
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Experimental study of snubber circuit design for SiC power MOSFET devices
Autorzy:: Niewiara, Ł. J.
Skiwski, M.
Tarczewski, T.
Grzesiak, L. M.
Powiązania:: https://bibliotekanauki.pl/articles/97236.pdf
Data publikacji:: 2015
Wydawca:: Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:: DC\DC converter
snubber circuit
SiC MOSFET
Opis:: In this paper a design process of snubber circuit for DC\DC converter is presented. Computer simulation and experimental tests were carried out. Due to the presence of parasitic LC (inductance and capacitance) circuit in the power stage, it is necessary to use an additional snubber circuit for voltage overshoot and oscillations reduction. A simulation model of the converter with parasitic circuit was designed. Six topologies of snubber circuits (C, single C, RC, single RC, RCD, single RCD) were investigated in simulation tests. Simulation model of the proposed system has been investigated in Matlab/Simulink/PLECS environment. Input signal parameters like voltage overshoot, rise time, fall time were compared for considered snubber circuits. Experimental tests were carried out for the best simulation results. It confirm the proper choice of snubber circuit.
Źródło:: Computer Applications in Electrical Engineering; 2015, 13; 120-131
1508-4248
Pojawia się w:: Computer Applications in Electrical Engineering
Dostawca treści:: Biblioteka Nauki

Artykuł

Informacja