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    Wyświetlanie 1-13 z 13
    Tytuł:
    Quantization error in time-to-digital converters
    Autorzy:
    Zaworski, Ł.
    Chaberski, D.
    Kowalski, M.
    Zieliński, M.
    Powiązania:
    https://bibliotekanauki.pl/articles/221677.pdf
    Data publikacji:
    2012
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    time interval measurement
    time-to-digital converter
    quantization error
    averaging
    Opis:
    Methods of time interval measurement can be divided into asynchronous and synchronous approaches. It is well known that in asynchronous methods of time-interval measurement, uncertainty can be reduced by using statistical averaging. The motivation of this paper is an investigation of averaging in time interval measurements, especially in a synchronous measurement. In this article, authors are considering the method of averaging to reduce the influence of quantization error on measurement uncertainty in synchronous time-interval measurement systems, when dispersion of results, caused by noise is present. A mathematical model of averaging, which is followed by the results of numerical simulations of averaging of measurement series is presented. The analysis of results leads to the conclusion that in particular conditions the influence of the quantization error on measurement uncertainty can be minimized by statistical averaging, similar to asynchronous measurements.
    Źródło:
    Metrology and Measurement Systems; 2012, 19, 1; 115-122
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Ultrasonic flow measurement with high resolution
    Autorzy:
    Grzelak, S.
    Czoków, J.
    Kowalski, M.
    Zieliński, M.
    Powiązania:
    https://bibliotekanauki.pl/articles/221448.pdf
    Data publikacji:
    2014
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    ultrasonic flowmeter
    time-to-digital converter
    programmable logic device
    time measurement
    Opis:
    The ultrasonic flowmeter which is described in this paper, measures the transit of time of an ultrasonic pulse. This device consists of two ultrasonic transducers and a high resolution time interval measurement module. An ultrasonic transducer emits a characteristic wave packet (transmit mode). When the transducer is in receive mode, a characteristic wave packet is formed and it is connected to the time interval measurement module inputs. The time interval measurement module allows registration of transit time differences of a few pulses in the packet. In practice, during a single measuring cycle a few time-stamps are registered. Moreover, the measurement process is also synchronous and, by applying the statistics, the time interval measurement uncertainty improves even in a single measurement. In this article, besides a detailed discussion on the principle of operation of the ultrasonic flowmeter implemented in the FPGA structure, also the test results are presented and discussed.
    Źródło:
    Metrology and Measurement Systems; 2014, 21, 2; 305-316
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    High resolution time-interval measurement systems applied to flow measurement
    Autorzy:
    Grzelak, S.
    Kowalski, M.
    Czoków, J.
    Zieliński, M.
    Powiązania:
    https://bibliotekanauki.pl/articles/221586.pdf
    Data publikacji:
    2014
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    FPGA
    time-to-digital converter
    multi-segment delay line
    carry chain
    Opis:
    The designing process of high resolution time interval measurement systems creates many problems that need to be eliminated. The problems are: the latch error, the nonlinearity conversion, the different duty cycle coefficient of the clock signal, and the clock signal jitter. Factors listed above affect the result of measurement. The FPGA (Field Programmable Gate Array) structure also imposes some restrictions, especially when a tapped delay line is constructed. The article describes the high resolution time-to-digital converter, implemented in a FPGA structure, and the types of errors that appear there. The method of minimization and processing of data to reduce the influence of errors on the measurement is also described.
    Źródło:
    Metrology and Measurement Systems; 2014, 21, 1; 77-84
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Time interval measurement module implemented in SoC FPGA device
    Autorzy:
    Grzęda, G.
    Szplet, R.
    Powiązania:
    https://bibliotekanauki.pl/articles/226962.pdf
    Data publikacji:
    2016
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    time interval measurement
    time-to-digital converter
    system on chip
    measurement data processing
    Opis:
    We presents the design and test results of a picosecond-precision time interval measurement module, integrated as a System-on-Chip in an FPGA device. Implementing a complete measurement instrument of a high precision in one chip with the processing unit gives an opportunity to cut down the size of the final product and to lower its cost. Such approach challenges the constructor with several design issues, like reduction of voltage noise, propagating through power lines common for the instrument and processing unit, or establishing buses efficient enough to transport mass measurement data. The general concept of the system, design hierarchy, detailed hardware and software solutions are presented in this article. Also, system test results are depicted with comparison to traditional ways of building a measurement instrument.
    Źródło:
    International Journal of Electronics and Telecommunications; 2016, 62, 3; 237-246
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Employing FPGA DSP blocks for time-to-digital conversion
    Autorzy:
    Kwiatkowski, Paweł
    Powiązania:
    https://bibliotekanauki.pl/articles/221505.pdf
    Data publikacji:
    2019
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    time-to-digital converter
    time coding line
    time interval counter
    digital signal processing
    field-programmable gate array
    Opis:
    The paper presents a novel implementation of a time-to-digital converter (TDC) in field-programmable gate array (FPGA) devices. The design employs FPGA digital signal processing (DSP) blocks and gives more than two-fold improvement in mean resolution in comparison with the common conversion method (carry chain-based time coding line). Two TDCs are presented and tested depending on DSP configuration. The converters were implemented in a Kintex-7 FPGA device manufactured by Xilinx in 28 nm CMOS process. The tests performed show possibilities to obtain mean resolution of 4.2 ps but measurement precision is limited to at most 15 ps mainly due to high conversion nonlinearities. The presented solution saves FPGA programmable logic blocks and has an advantage of a wider operation range when compared with a carry chain-based time coding line.
    Źródło:
    Metrology and Measurement Systems; 2019, 26, 4; 631-643
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Comparison of Interpolators Used for Time-Interval Measurement Systems Based on Multiple-Tapped Delay Line
    Autorzy:
    Chaberski, D.
    Frankowski, R.
    Gurski, M.
    Zieliński, M.
    Powiązania:
    https://bibliotekanauki.pl/articles/221043.pdf
    Data publikacji:
    2017
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    time interval
    multiple-tapped delay line
    quantization-and-nonlinearity minimization
    FPGA
    time-to-digital converter
    Opis:
    The paper describes the construction, operation and test results of three most popular interpolators from a viewpoint of time-interval (TI) measurement systems consisting of many tapped-delay lines (TDLs) and registering pulses of a wide-range changeable intensity. The comparison criteria include the maximum intensity of registered time stamps (TSs), the dependency of interpolator characteristic on the registered TSs’ intensity, the need of using either two counters or a mutually-complementing pair counter-register for extending a measurement range, the need of calculating offsets between TDL inputs and the dependency of a resolution increase on the number of used TDL segments. This work also contains conclusions about a range of applications, usefulness and methods of employing each described TI interpolator. The presented experimental results bring new facts that can be used by the designers who implement precise time delays in the field-programmable gate arrays (FPGA).
    Źródło:
    Metrology and Measurement Systems; 2017, 24, 2; 401-412
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Methods of precise determining the transfer function of picosecond time-to-digital converters
    Autorzy:
    Sondej, Dominik
    Szymanowski, Rafał
    Szplet, Ryszard
    Powiązania:
    https://bibliotekanauki.pl/articles/1849060.pdf
    Data publikacji:
    2021
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    time-to-digital converter
    equivalent conversion function
    delay line
    multi-edge coding
    wave-union
    Opis:
    We present two main ways to precisely create the equivalent transfer function of picosecond time-to-digital converters based on commonly used method with tapped time coding delay lines. The ways consist either in evaluation of the quantization steps boundaries of the delay lines or in summation of numbers of the line quantization steps. The paper contains results of comprehensive analysis of both methods. The advantage and high versatility of the addition method is demonstrated.
    Źródło:
    Metrology and Measurement Systems; 2021, 28, 3; 539-549
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Methods of precise determining the transfer function of picosecond time-to-digital converters
    Autorzy:
    Sondej, Dominik
    Szymanowski, Rafał
    Szplet, Ryszard
    Powiązania:
    https://bibliotekanauki.pl/articles/1848997.pdf
    Data publikacji:
    2021
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    time-to-digital converter
    equivalent conversion function
    delay line
    multi-edge coding
    wave-union
    Opis:
    We present two main ways to precisely create the equivalent transfer function of picosecond time-to-digital converters based on commonly used method with tapped time coding delay lines. The ways consist either in evaluation of the quantization steps boundaries of the delay lines or in summation of numbers of the line quantization steps. The paper contains results of comprehensive analysis of both methods. The advantage and high versatility of the addition method is demonstrated.
    Źródło:
    Metrology and Measurement Systems; 2021, 28, 3; 539-549
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    A time-domain pulse amplitude and width discrimination method for photon counting
    Autorzy:
    del Mar Correa, M.
    Pérez, F. R.
    Powiązania:
    https://bibliotekanauki.pl/articles/220971.pdf
    Data publikacji:
    2018
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    field-programmable gate array
    time-to-digital converter
    spectroscopy
    photomultiplier
    photon counting
    discriminator
    after-pulsing
    low-voltage differential signalling
    Opis:
    This work shows a time-domain method for the discrimination and digitization of parameters of voltage pulses coming from optical detectors, taking into account the presence of electronic noise and afterpulsing. Our scheme is based on an FPGA-based time-to-digital converter as well as an adjustable-threshold comparator complemented with commercial elements. Here, the design, implementation and optimization of a multiphase TDC using delay lines shorter than a single clock period is also described. The performance of this signal processing system is discussed through the results from the statistical code density test, statistical distributions of measurements and information gathered from an optical detector. Unlike dual voltage threshold discriminators or constant-fraction discriminators, the proposed method uses amplitude and time information to define an adjustable discrimination window that enables the acquisition of spectra.
    Źródło:
    Metrology and Measurement Systems; 2018, 25, 2; 269-282
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Estimation and correction of gain mismatch and timing error in time-interleaved ADCs based on DFT
    Autorzy:
    Guo, L.
    Tian, S.
    Wang, Z.
    Powiązania:
    https://bibliotekanauki.pl/articles/221135.pdf
    Data publikacji:
    2014
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    correction
    estimation
    gain mismatch
    time-interleaved analog-to-digital converter
    timing error
    Opis:
    Time-interleaved analog-to-digital converter (ADC) architecture is crucial to increase the maximum sample rate. However, offset mismatch, gain mismatch, and timing error between time-interleaved channels degrade the performance of time-interleaved ADCs. This paper focuses on the gain mismatch and timing error. Techniques based on Discrete Fourier Transform (DFT) for estimating and correcting gain mismatch and timing error in an M-channel ADC are depicted. Numerical simulations are used to verify the proposed estimation and correction algorithm.
    Źródło:
    Metrology and Measurement Systems; 2014, 21, 3; 535-544
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    5 ps Jitter Programmable Time Interval/Frequency Generator
    Autorzy:
    Kwiatkowski, P.
    Różyc, K.
    Sawicki, M.
    Jachna, Z.
    Szplet, R.
    Powiązania:
    https://bibliotekanauki.pl/articles/221151.pdf
    Data publikacji:
    2017
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    time interval generator
    digital-to-time converter
    DDS synthesizer
    phase shifting
    FPGA
    Opis:
    A new time interval/frequency generator with a jitter below 5 ps is described. The time interval generation mechanism is based on a phase shifting method with the use of a precise DDS synthesizer. The output pulses are produced in a Spartan-6 FPGA device, manufactured by Xilinx in 45 nm CMOS technology. Thorough tests of the phase shifting in a selected synthesizer are performed. The time interval resolution as low as 0.3 ps is achieved. However, the final resolution is limited to 500 ps to maximize precision. The designed device can be used as a source of high precision reference time intervals or a highly stable square wave signal of frequency up to 50 MHz.
    Źródło:
    Metrology and Measurement Systems; 2017, 24, 1; 57-68
    0860-8229
    Pojawia się w:
    Metrology and Measurement Systems
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Linearized 9-Bit Hybrid LBDD PWM Modulator for Digital Class-BD Amplifier
    Autorzy:
    Kołodziejski, Wojciech
    Kuta, Stanisław
    Powiązania:
    https://bibliotekanauki.pl/articles/1844591.pdf
    Data publikacji:
    2021
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    class-BD digital audio amplifier
    linearized pulse width modulation (LPWM)
    Linearized Class-BD Double sided (LBDD)
    Digital to Time Converter (DTC)
    Opis:
    The paper presents an original architecture and implementation of 9-bit Linearized Pulse Width Modulator (LPWM) for Class-BD amplifier, based on the hybrid method using STM32 microcontroller and Programmable Tapped Delay Line (PTDL). The analog input signals are converted into 12-bit PCM signals, then are directly transformed into 32-bit LBDD DPWM data of the pulse-edge locations within n-th period of the switching frequency, next requantized to the 9-bit digital outputs, and finally converted into the two physical trains of 1-bit PWM signals, to control the output stage of the Class-BD audio amplifier. The hybrid 9-bit quantizer converts 6 MSB bits using counter method, based on the peripherals of STM32 microcontroller, while the remaining 3 LSB bits - using a method based on the PTDL. In the paper extensive verification of algorithm and circuit operation as well as simulation in MATLAB and experimental results of the proposed 9-bit hybrid LBDD DPWM circuit have been performed. It allows to attain SNR of 80 dB and THD about 0,3% within the audio baseband.
    Źródło:
    International Journal of Electronics and Telecommunications; 2021, 67, 1; 49-57
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Sampling Jitter in Audio A/D Converters
    Autorzy:
    Kulka, Z.
    Powiązania:
    https://bibliotekanauki.pl/articles/177046.pdf
    Data publikacji:
    2011
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    analog-to-digital converter
    ADC
    successive approximation register (SAR)
    sigma-delta ADC
    sample-and-hold circuit
    DT sigma delta modulator
    CT sigma delta modulator
    time jitter
    aperture jitter
    clock jitter
    periodic clock jitter
    signal-to-noise ratio (SNR)
    Opis:
    This paper provides an overview of the effects of timing jitter in audio sampling analog-to-digital converters (ADCs), i.e. PCM (conventional or Nyquist sampling) ADCs and sigma-delta (ΣΔ) ADCs. Jitter in a digital audio is often defined as short- term fluctuations of the sampling instants of a digital signal from their ideal positions in time. The influence of the jitter increases particularly with the improvements in both resolution and sampling rate of today’s audio ADCs. At higher frequencies of the input signals the sampling jitter becomes a dominant factor in limiting the ADCs performance in terms of signal-to-noise ratio (SNR) and dynamic range (DR).
    Źródło:
    Archives of Acoustics; 2011, 36, 4; 831-849
    0137-5075
    Pojawia się w:
    Archives of Acoustics
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-13 z 13

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