Temat: digital signal processing. - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Active power measurements - an overview and comparison of DSP algorithms by noncoherent sampling
Autorzy:: Sedlacek, M.
Stoudek, Z.
Powiązania:: https://bibliotekanauki.pl/articles/220475.pdf
Data publikacji:: 2011
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: power estimation
digital signal processing
non-coherent sampling
Opis:: This paper presents an overview of algorithms for one-phase active power estimation using digital signal processing in the time domain and in the frequency domain, and compares the properties of these algorithms for a sinusoidal test signal. The comparison involves not only algorithms that have already been published, but also a new algorithm. Additional information concerning some known algorithms is also included. We present the results of computer simulations in MATLAB and measurement results gained by means of computer plug-in boards, both multiplexed and using simultaneous signal sampling. The use of new cosine windows with a recently published iterative algorithm is also included, and the influence of additive noise in the test signal is evaluated.
Źródło:: Metrology and Measurement Systems; 2011, 18, 2; 173-184
0860-8229
Pojawia się w:: Metrology and Measurement Systems
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Direct Comparison of Analogue and Digital FGPA-Based Approaches to Synchronous Detection
Autorzy:: Teren, O.
Tomlain, J.
Sedlacek, R.
Powiązania:: https://bibliotekanauki.pl/articles/221544.pdf
Data publikacji:: 2018
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: synchronous detection
lock-in amplifier
digital signal processing
FPGA
measurement of impedance
Opis:: This paper deals with a comparison between digital and analogue implementation of a synchronous detection algorithm. The commonly used implementation methods of synchronous detection are presented in the paper. The paper describes FPGA-based digital and analogue hardware approaches, focusing on the digital design. The characteristics of used analogue-to-digital converters are measured. Both proposed approaches are directly compared in terms of sensitivity and long-term stability. The achieved results, along with identified limitations and proposed improvements are widely discussed.
Źródło:: Metrology and Measurement Systems; 2018, 25, 1; 57-69
0860-8229
Pojawia się w:: Metrology and Measurement Systems
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 3.

Tytuł:: Employing FPGA DSP blocks for time-to-digital conversion
Autorzy:: Kwiatkowski, Paweł
Powiązania:: https://bibliotekanauki.pl/articles/221505.pdf
Data publikacji:: 2019
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: time-to-digital converter
time coding line
time interval counter
digital signal processing
field-programmable gate array
Opis:: The paper presents a novel implementation of a time-to-digital converter (TDC) in field-programmable gate array (FPGA) devices. The design employs FPGA digital signal processing (DSP) blocks and gives more than two-fold improvement in mean resolution in comparison with the common conversion method (carry chain-based time coding line). Two TDCs are presented and tested depending on DSP configuration. The converters were implemented in a Kintex-7 FPGA device manufactured by Xilinx in 28 nm CMOS process. The tests performed show possibilities to obtain mean resolution of 4.2 ps but measurement precision is limited to at most 15 ps mainly due to high conversion nonlinearities. The presented solution saves FPGA programmable logic blocks and has an advantage of a wider operation range when compared with a carry chain-based time coding line.
Źródło:: Metrology and Measurement Systems; 2019, 26, 4; 631-643
0860-8229
Pojawia się w:: Metrology and Measurement Systems
Dostawca treści:: Biblioteka Nauki

Artykuł

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