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Wyszukujesz frazę "Grzesiak, L M." wg kryterium: Autor


Wyświetlanie 1-4 z 4
Tytuł:
Artifical potential fields with extended Bug algorithm for Mars rover path planning in an unknown environment
Autorzy:
Wyrąbkiewicz, K.
Tarczewski, T.
Grzesiak, L.M.
Powiązania:
https://bibliotekanauki.pl/articles/1395762.pdf
Data publikacji:
2014
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
autonomous mobile robot
mars rover
path planning
artificial potential fields
Bug algorithm
Opis:
In this paper artificial potential fields method applied to autonomous mobile robot -mars rover is presented. It is assumed that Mars rover operates in an unknown environment. In order to visualize the robot's path in environment Matlab software is used. The object can be inserted by graphic data input interface in top view mode. The method of artificial potential fields is extended by an additional algorithm to avoid a local minimum. The proposed algorithm is implemented as a state machine. In this paper simulations results of the developed algorithm are presented. Extended algorithm is used because in the environment may be located complex obstacles.
Źródło:
Computer Applications in Electrical Engineering; 2014, 12; 422-433
1508-4248
Pojawia się w:
Computer Applications in Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Based on neural network adaptive linear quadratic regulator for inverter with voltage matching circuit
Autorzy:
Niewiara, Ł.
Tarczewski, T.
Grzesiak, L.M.
Powiązania:
https://bibliotekanauki.pl/articles/97686.pdf
Data publikacji:
2014
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
adaptive linear-quadratic regulator
voltage matching circuit
artificial neural network
current ripple
Opis:
This paper describes a discrete adaptive linear quadratic regulator used to load current control in terms of variable DC voltage of inverter. Controller was designed by using linear quadratic optimization method. Adaptive LQR was used because of non-stationarity of the control system caused by Voltage Matching Circuit - VMC. Gain values of the adaptive controller were approximated by using an artificial neural network. The VMC was realized as an additional buck converter integrated with the main inverter. As the load of the 2-level inverter a 3-phase symmetric RL circuit was used. Simulation tests show the behavior of the load current regulation during DC bus voltage level step changes. The dependence between current RMS value and inverter DC bus voltage level was also shown. There were also made a comparison of the traditional 2-level inverter structure with the modified structure uses VMC. Simulation test was made by using Matlab Simulink and PLECS software.
Źródło:
Computer Applications in Electrical Engineering; 2014, 12; 434-443
1508-4248
Pojawia się w:
Computer Applications in Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Analysis of circuit and operation for DC–DC converter based on silicon carbide
Autorzy:
Niewiara, Ł. J.
Tarczewski, T.
Grzesiak, L. M.
Powiązania:
https://bibliotekanauki.pl/articles/97287.pdf
Data publikacji:
2016
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
DC\DC converter
SiC MOSFETS
high switching frequency
DC–DC converter design
snubber circuit
Opis:
In this paper operating analysis of DC–DC converter is presented. Silicon Carbide based DC–DC converter is investigated. SiC power switches (i.e. MOSFETs and diodes) were used. Synchronous buck topology is applied for converter structure. The DC–DC converter mathematical model is also presented. The parameters of LC circuit were calculated using shown equations. Working conditions determine the values of output LC circuit (inductance and capacitance). Real power semiconductors are equipped in output and input capacitances. This feature may influence the generated input signal. Parasitic capacitances and inductances of the paths causes oscillations and voltage overshoots of the input PWM signal. To avoid such phenomenon, it is necessary to use a snubber circuit. This issue is also presented. The analysis of working conditions is presented for different switching frequencies. The size of passive components (LC) is compared for different operating points. Experimental tests results were presented. Waveforms of voltage and current signals were also shown.
Źródło:
Computer Applications in Electrical Engineering; 2016, 14; 268-279
1508-4248
Pojawia się w:
Computer Applications in Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Experimental study of snubber circuit design for SiC power MOSFET devices
Autorzy:
Niewiara, Ł. J.
Skiwski, M.
Tarczewski, T.
Grzesiak, L. M.
Powiązania:
https://bibliotekanauki.pl/articles/97236.pdf
Data publikacji:
2015
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
DC\DC converter
snubber circuit
SiC MOSFET
Opis:
In this paper a design process of snubber circuit for DC\DC converter is presented. Computer simulation and experimental tests were carried out. Due to the presence of parasitic LC (inductance and capacitance) circuit in the power stage, it is necessary to use an additional snubber circuit for voltage overshoot and oscillations reduction. A simulation model of the converter with parasitic circuit was designed. Six topologies of snubber circuits (C, single C, RC, single RC, RCD, single RCD) were investigated in simulation tests. Simulation model of the proposed system has been investigated in Matlab/Simulink/PLECS environment. Input signal parameters like voltage overshoot, rise time, fall time were compared for considered snubber circuits. Experimental tests were carried out for the best simulation results. It confirm the proper choice of snubber circuit.
Źródło:
Computer Applications in Electrical Engineering; 2015, 13; 120-131
1508-4248
Pojawia się w:
Computer Applications in Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-4 z 4

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