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Wyszukujesz frazę "silicon-on-insulator" wg kryterium: Temat


Wyświetlanie 1-9 z 9
Tytuł:
Silicon-on-Insulator technology for imaging and application to a switching photodetector
Autorzy:
Abdo, N.
Sallin, D.
Koukab, A.
Estribeau, M.
Magnan, P.
Kayal, M.
Powiązania:
https://bibliotekanauki.pl/articles/397865.pdf
Data publikacji:
2015
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
photodetectors
silicon-on-insulator
fotodetektory
SOI
Opis:
This paper analyzes some advantages of Silicon-on-Insulator (SOI) based photodetectors for low light imaging. It shows that SOI based sensors not only solve the bulk carriers problem, it can also act as a very selective spectral filter by acting as a resonant cavity, which is useful in application with a very narrow spectrum of interest, such as bioluminescence imaging. The SOI implementation of a switching photodetector based with an hybrid MOS-PN structure is presented and its advantages in terms of dark current minimization and SNR improvement highlighted.
Źródło:
International Journal of Microelectronics and Computer Science; 2015, 6, 4; 136-141
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Impurity-concentration dependence of seebeck coefficient in silicon-on-insulator layers
Autorzy:
Salleh, F.
Asai, K.
Ishida, A.
Ikeda, H.
Powiązania:
https://bibliotekanauki.pl/articles/385169.pdf
Data publikacji:
2009
Wydawca:
Sieć Badawcza Łukasiewicz - Przemysłowy Instytut Automatyki i Pomiarów
Tematy:
Seebeck coefficient
ultrathin silicon-on-Insulator layers
nanostructure
impurity band
Opis:
We measured the Seebeck coefficient of P-doped ultrathin silicon-on-insulator (SOI) layers with thicknesses of 6-100 nm. The dependence of the coefficient on the impurity concentration was investigated, and was shown to be in good agreement with that of bulk Si. In addition, it was found to decrease with increasing impurity concentration, as is usual in semiconductor materials. However, for doping levels above 3.5x1019 cm-3, the Seebeck coefficient was observed to increase. This is likely to be due to the influence of an impurity band.
Źródło:
Journal of Automation Mobile Robotics and Intelligent Systems; 2009, 3, 4; 134-136
1897-8649
2080-2145
Pojawia się w:
Journal of Automation Mobile Robotics and Intelligent Systems
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
SOI Technology: An Opportunity for RF Designers?
Autorzy:
Raskin, J.-P.
Powiązania:
https://bibliotekanauki.pl/articles/308241.pdf
Data publikacji:
2009
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
crosstalk
high resistivity silicon substrate
MOSFET
nonlinearities
silicon-on-insulator
wideband characterization
Opis:
This last decade silicon-on-insulator (SOI) MOS-FET technology has demonstrated its potentialities for high frequency (reaching cutoff frequencies close to 500 GHz for n-MOSFETs) and for harsh environments (high temperature, radiation) commercial applications. For RF and system-onchip applications, SOI also presents the major advantage of providing high resistivity substrate capabilities, leading to substantially reduced substrate losses. Substrate resistivity values higher than 1 k? cm can easily be achieved and high resistivity silicon (HRS) is commonly foreseen as a promising substrate for radio frequency integrated circuits (RFIC) and mixed signal applications. In this paper, based on several experimental and simulation results the interest, limitations but also possible future improvements of the SOI MOS technology are presented.
Źródło:
Journal of Telecommunications and Information Technology; 2009, 4; 3-17
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An improved effective index method for planar multimode waveguide design on an silicon-on-insulator (SOI) platform
Autorzy:
Le, T T
Powiązania:
https://bibliotekanauki.pl/articles/174442.pdf
Data publikacji:
2013
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
multimode interference (MMI)
silicon-on-insulator (SOI)
effective index method (EIM)
Opis:
In this paper, an improved effective index method (EIM) for designing planar multimode waveguides on the silicon-on-insulator (SOI) platform is presented. The proposed method predicts the evolution of the fields more accurately than the conventional effective index method. This improved method is particularly suited to the design of multimode interference (MMI) couplers.
Źródło:
Optica Applicata; 2013, 43, 2; s. 271-277
0078-5466
1899-7015
Pojawia się w:
Optica Applicata
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
On-wafer wideband characterization: a powerful tool for improving the IC technologies
Autorzy:
Lederer, D.
Raskin, J. P.
Powiązania:
https://bibliotekanauki.pl/articles/308775.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
silicon-on-insulator (SOI)
MOSFET
wideband characterization
microwave frequency
extraction techniques
small-signal equivalent circuit
Opis:
In the present paper, the interest of wideband characterization for the development of integrated technologies is highlighted through several advanced devices, such as 120 nm partially depleted (PD) silicon-on-insulator (SOI) MOSFETs, 120 nm dynamic threshold (DT) voltage - SOI MOSFETs, 50 nm FinFETs as well as long-channel planar double gate (DG) MOSFETs.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 2; 69-77
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Challenges for 10 nm MOSFET process integration
Autorzy:
Östling, M.
Malm, B. G.
Haartman, M.
Hallstedt, J.
Zhang, Z.
Hellström, P. E.
Zhang, S.
Powiązania:
https://bibliotekanauki.pl/articles/309004.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
sstrained silicon
silicon-germanium
silicon-on-insulator (SOI)
high-k dielectrics
hafnium oxide
nanowire
low frequency noise
mobility
metal gate
Opis:
An overview of critical integration issues for future generation MOSFETs towards 10 nm gate length is presented. Novel materials and innovative structures are discussed. The need for high-k gate dielectrics and a metal gate electrode is discussed. Different techniques for strain-enhanced mobility are discussed. As an example, ultra thin body SOI devices with high mobility SiGe channels are demonstrated.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 2; 25-32
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Compact Transverse Electric Silicon-on-Insulator Mode Converter for Mode-Division Multiplexer
Autorzy:
Sharaf, Mohamed H.
El-Mashade, Mohamed B.
Emran, Ahmed A.
Powiązania:
https://bibliotekanauki.pl/articles/2055263.pdf
Data publikacji:
2022
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
integrated optics
silicon-on-insulator waveguide
WDM & MDM systems
perturbation theory
integrated optical
devices
hybrid modes
guided waves
Opis:
On-chip optical-interconnect technology emerges as an attractive approach due to its ultra-large bandwidth and ultra-low power consumption. Silicon-on-insulator (SOI) wire waveguides, on the other hand, have been identified to potentially replace copper wires for intra-chip communication. To take advantage of the wide bandwidth of SOI waveguides, wavelengthdivision multiplexing (WDM) has been implemented. However, WDM have inherent drawbacks. Mode-division multiplexing (MDM) is a viable alternative to WDM in MIMO photonic circuits on SOI as it requires only one carrier wavelength to operate. In this vein, mode converters are key components in on-chip MDM systems. The goal of this paper is to introduce a transverse electric mode converter. The suggested device can convert fundamental transverse electric modes to first-order transverse electric ones and vice versa. It is based on small material perturbation which introduces gradual coupling between different modes. This device is very simple and highly compact; the size of which is 3 μm². Mathematical expressions for both the insertion loss and crosstalk are derived and optimized for best performance. In addition, three-dimensional finite-difference time-domain (3D-FDTD) simulations are performed in order to verify the mathematical model of the device. Our numerical results reveal that the proposed device has an insertion loss of 1.2 dB and a crosstalk of 10.1 dB. The device’s insertion loss can be decreased to 0.95 dB by adding tapers to its material perturbation.
Źródło:
International Journal of Electronics and Telecommunications; 2022, 68, 2; 275--280
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
High-field current transport and charge trapping in buried oxide of SOI materials under high-field electron injection
Autorzy:
Nazarov, A.N.
Houk, Y.
Kilchytska, V.I.
Powiązania:
https://bibliotekanauki.pl/articles/308027.pdf
Data publikacji:
2004
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
Fowler-Nordheim current
trap-assisted tunneling
silicon-on-insulator
buried oxide
SIMOX
UNIBOND
anode hole injection
band-to-band impact ionization
Opis:
Mechanisms of the charge transfer, the charge trapping, and the generation of positive charge during the high-field electron injection into buried oxide of silicon-on-insulator structures fabricated by different technologies are analyzed based on the data obtained from current-voltage, injection current-time, and capacitance-voltage characteristics together with SIMS data. Electron injection both from the Si film and the Si substrate is considered. The possibility of using the trap-assisted electron tunneling mechanisms to explain the high-field charge transfer through the buried oxides of UNIBOND and SIMOX SOI materials is considered. It is shown that considerable positive charge is accumulated near the buried oxide/substrate interface independently from the direction of the injection (from the film or from the silicon substrate) for UNIBOND and SIMOX SOI structures. Thermal stability of the charge trapped in the buried oxides is studied at temperatures ranging from 20 to 400° C. The theory is compared with the experimental data to find out the mechanisms of the generation of positive charge in UNIBOND and SIMOX buried oxides.
Źródło:
Journal of Telecommunications and Information Technology; 2004, 1; 50-61
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Analysis and optimization of LUDMOS transistors on a 0.18um SOI CMOS technology
Autorzy:
Toulon, G.
Cortés, I.
Morancho, F.
Villard, B.
Powiązania:
https://bibliotekanauki.pl/articles/397849.pdf
Data publikacji:
2010
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
moc MOSFET
LDMOS
RESURF
STI (płytki rów izolacyjny)
krzem na izolatorze
power MOSFET
STI (shallow trench isolation)
superjunction
silicon-on-insulator
Opis:
This paper is focused on the design and optimization of power LDMOS transistors (V br > 120 Volts) with the purpose of being integrated in a new generation of Smart Power technology based upon a 0.18 μm SOI-CMOS technology. The benefits of applying the shallow trench isolation (STI) concept along with the 3D RESURF concept in the LDMOS drift region is analyzed in terms of the main static (Ron-sp/Vbr tradeoff) and dynamic (Miller capacitance and QgxRon FOM) characteristics. The influence of some design parameters such as the polysilicon gate electrode length and the STI length are exhaustively analyzed.
Źródło:
International Journal of Microelectronics and Computer Science; 2010, 1, 1; 3-8
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-9 z 9

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