Temat: LDO regulator - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Co-design of a low-power RF receiver and piezoelectric energy harvesting power supply for a Wireless Sensor Node
Autorzy:: Mancelos, N
Correia, J
Oliveira, J. P.
Oliveira, L. B.
Powiązania:: https://bibliotekanauki.pl/articles/398018.pdf
Data publikacji:: 2014
Wydawca:: Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:: CMOS RF analog front-end
low-voltage wideband balun LNA
passive mixer
piezoelectric energy harvesting
active full bridge rectifier
LDO regulator
układ analogowy CMOS
balun szerokopasmowy
mikser pasywny
energia piezoelektryczna
prostownik aktywny
prostownik mostkowy
regulator LDO
Opis:: A low-voltage RF CMOS receiver front-end and an energy harvesting power circuit for a piezoelectric source are presented as a co-designed solution for a Wireless Sensor Node. A MOSFET-only Wideband balun LNA with noise cancelling and a 0.6 V supply voltage is designed in conjunction with a passive mixer. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver front-end reaches a total voltage conversion gain of 31 dB, a 0.1-5.2 GHZ bandwidth, an IIP3 value of -1.35 dBm, and a noise ﬁgure inferior to 9 dB. The total power consumption is 1.95 mW. The energy harvesting power circuit consists of an active full bridge cross-coupled rectiﬁer followed by a low-dropout (LDO) regulator, and it is able to guarantee a power output of 6 mW with a regulated output voltage of 0.6 V, for typical vibration patterns.
Źródło:: International Journal of Microelectronics and Computer Science; 2014, 5, 4; 136-143
2080-8755
2353-9607
Pojawia się w:: International Journal of Microelectronics and Computer Science
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 2.

Tytuł:: On and Off Chip Capacitor Free, Fast Response, Low Drop-out Voltage Regulator
Autorzy:: Prasad, Guru
Shama, Kumara
Powiązania:: https://bibliotekanauki.pl/articles/955942.pdf
Data publikacji:: 2019
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: voltage regulator
capacitor free LDO
fast response
area efficient
Opis:: A low drop-out [LDO] voltage regulator with fast transient response which does not require capacitor for proper operation is proposed in this paper. Recent cap-less LDOs do not use off chip capacitor but instead they use on chip capacitor which occupy large area on chip. In the proposed LDO this on chip capacitor is also avoided. A novel secondary local feed-back technique is introduced which helps to achieve a good transient response even in the absence of output capacitor. Further a self compensating error amplifier is selected to eliminate the need of compensating capacitor. Stability analysis shows that the proposed LDO is stable with a phase margin of 78 0. The proposed LDO is laid out using Cadence spectre in 180 nm standard CMOS technology. Post layout simulation is carried out and LDO gives 6mV/V and 360μV /mA line and load regulation respectively. An undershoot of 120 mV is observed during the load transition from 0 mA to 50 mA with 1 μs transition time, however LDO is able to recover within 1.4μs. Since capacitor is not required in any part of design, it occupies only 0.010824 mmXmm area on chip.
Źródło:: International Journal of Electronics and Telecommunications; 2019, 65, 2; 159-165
2300-1933
Pojawia się w:: International Journal of Electronics and Telecommunications
Dostawca treści:: Biblioteka Nauki

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