Informacja

Drogi użytkowniku, aplikacja do prawidłowego działania wymaga obsługi JavaScript. Proszę włącz obsługę JavaScript w Twojej przeglądarce.

Wyszukujesz frazę "gate" wg kryterium: Temat


Tytuł:
Applying shallow nitrogen implantation from rf plasma for dual gate oxide technology
Autorzy:
Bieniek, T.
Beck, R. B.
Jakubowski, A.
Głuszko, G.
Konarski, P.
Ćwil, M.
Powiązania:
https://bibliotekanauki.pl/articles/308685.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
CMOS
dual gate oxide
gate stack
oxynitride
plasma implantation
Opis:
The goal of this work was to study nitrogen implantation from plasma with the aim of applying it in dual gate oxide technology and to examine the influence of the rf power of plasma and that of oxidation type. The obtained structures were examined by means of ellipsometry, SIMS and electrical characterization methods.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 3; 3-8
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Challenges in scaling of CMOS devices towards 65 nm node
Autorzy:
Jurczak, M.
Veloso, A.
Rooyackers, R.
Augendre, E.
Mertens, S.
Rotschild, A.
Scaekers, M.
Lindsay, R.
Lauwers, A.
Henson, K.
Severi, S.
Pollentier, I.
Keersgieter de, A.
Powiązania:
https://bibliotekanauki.pl/articles/308984.pdf
Data publikacji:
2005
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
CMOS devices
gate dielectrics
shallow junctions
silicide
gate stack
lithography
gate patterning
silicon recess
device integration
Opis:
The current trend in scaling transistor gate length below 60 nm is posing great challenges both related to process technology and circuit/system design. From the process technology point of view it is becoming increasingly difficult to continue scaling in traditional way due to fundamental limitations like resolution, quantum effects or random fluctuations. In turn, this has an important impact on electrical device specifications especially leakage current and the circuit power dissipation.
Źródło:
Journal of Telecommunications and Information Technology; 2005, 1; 3-6
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A novel proposal for all-optical XOR/XNOR gate using a nonlinear photonic crystal based ring resonator
Autorzy:
Asghari, Mehrnoush
Moloudian, Gholamhosein
Hassangholizadeh-Kashtiban, Mahdi
Powiązania:
https://bibliotekanauki.pl/articles/173268.pdf
Data publikacji:
2019
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
photonic crystal
optical logics
XOR gate
XNOR gate
Kerr effect
Opis:
Optical logic gates are very important structures required for creating all-optical digital signal processing systems. Optical XOR and XNOR gates can be used for designing optical adders and optical comparators, respectively. In this paper we proposed a novel structure which can be used for simultaneous implementation of optical XOR and XNOR logic gates. The proposed structure was designed using a nonlinear photonic crystal ring resonator. The delay time for XOR and XNOR gates are 1.7 and 3 ps, respectively.
Źródło:
Optica Applicata; 2019, 49, 2; 283-291
0078-5466
1899-7015
Pojawia się w:
Optica Applicata
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Model of a sliding gate controlled by a PLC driver
Autorzy:
Majcher, Jacek
Powiązania:
https://bibliotekanauki.pl/articles/376511.pdf
Data publikacji:
2019
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
PLC
sliding gate
visualisation
Opis:
Due to low costs, PLC controllers are used not only in technological processes but also in everyday life. The article presents the possibility of using a PLC controller to control the operation of a sliding gate. For this purpose, a design was created and a sliding gate model made controlled with a Siemens S7-1200 PLC controller. This model is used to develop various gate control algorithms, especially for appropriate gate protection against crushing or uncontrolled closing. In addition, this model is connected via the Internet to a stand equipped with the SCADA application. The iFix 5.8 PL application was used to visualise the operation of the door, which, by means of a communication driver, allows the elevator operation to be controlled remotely. In addition, elements are shown in a graphic way, whereby it is possible to assess the position of the gate.
Źródło:
Poznan University of Technology Academic Journals. Electrical Engineering; 2019, 99; 191-199
1897-0737
Pojawia się w:
Poznan University of Technology Academic Journals. Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Special size effects in advanced single-gate and multiple-gate SOI transistors
Autorzy:
Ohata, A.
Ritzenthaler, R.
Faynot, O.
Cristoloveanu, S.
Powiązania:
https://bibliotekanauki.pl/articles/308994.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
MOSFET
SOI
ultra-thin silicon
multiple-gate
mobility
coupling effect
thin gate oxide
gate-induced floating body effect
drain-induced virtual substrate biasing
Opis:
State-of-the-art SOI transistors require a very small body. This paper examines the effects of body thinning and thin-gate oxide in SOI MOSFETs on their electrical characteristics. In particular, the influence of film thickness on the interface coupling and carrier mobility is discussed. Due to coupling, the separation between the front and back channels is difficult in ultra-thin SOI MOSFETs. The implementation of the front-gate split C-V method and its limitations for determining the front- and back-channel mobility are described. The mobility in the front channel is smaller than that in the back channel due to additional Coulomb scattering. We also discuss the 3D coupling effects that occur in FinFETs with triple-gate and omega-gate configurations. In low-doped or tall fins the corner effect is suppressed. Narrow devices are virtually immune to substrate effects due to a strong lateral coupling between the two lateral sides of the gate. Short-channel effects are drastically reduced when the lateral coupling screens the drain influence.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 2; 14-24
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Composition and electrical properties of ultra-thin SiOxNy layers formed by rf plasma nitrogen implantation/plasma oxidation processes
Autorzy:
Bieniek, T.
Beck, R. B.
Jakubowski, A.
Konarski, P.
Ćwil, M.
Hoffman, P.
Schmeißer, D.
Powiązania:
https://bibliotekanauki.pl/articles/308689.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
CMOS
gate stack
oxynitride
plasma implantation
Opis:
Experiments presented in this work are a summary of the study that examines the possibility of fabrication of oxynitride layers for Si structures by nitrogen implantation from rf plasma only or nitrogen implantation from rf plasma followed immediately by plasma oxidation process. The obtained layers were characterized by means of: ellipsometry, XPS and ULE-SIMS. The results of electrical characterization of NMOS Al-gate test structures fabricated with the investigated layers used as gate dielectric, are also discussed.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 3; 9-15
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Modal Analysis of a Steel Radial Gate Exposed to Different Water Levels
Autorzy:
Brusewicz, K.
Sterpejkowicz-Wersocki, W.
Jankowski, R.
Powiązania:
https://bibliotekanauki.pl/articles/241116.pdf
Data publikacji:
2017
Wydawca:
Polska Akademia Nauk. Instytut Budownictwa Wodnego PAN
Tematy:
modal analysis
radial gate
dynamic loads
Opis:
With the increase in water retention needs and planned river regulation, it might be important to investigate the dynamic resistance of vulnerable elements of hydroelectric power plants, including steelwater locks. The most frequent dynamic loads affecting hydroengineering structures in Poland include vibrations caused by heavy road and railway traffic, piling works and mining tremors. More destructive dynamic loads, including earthquakes, may also occur in our country, although their incidence is relatively low. However, given the unpredictable nature of such events, as well as serious consequences they might cause, the study of the seismic resistance of the steel water gate, as one of the most vulnerable elements of a hydroelectric power plant, seems to be important. In this study, a steel radial gate has been analyzed. As far as water gates are concerned, it is among the most popular solutions because of its relatively small weight, compared to plain gates. A modal analysis of the steel radial gate was conducted with the use of the FEM in the ABAQUS software. All structural members were modelled using shell elements with detailed geometry representing a real structure.Water was modelled as an added mass affecting the structure. Different water levels were used to determine the most vulnerable state of the working steel water gate. The results of the modal analysis allowed us to compare the frequencies and their eigenmodes in response to different loads, which is one of the first steps in researching the dynamic properties of steel water gates and their behaviour during extreme dynamic loads, including earthquakes.
Źródło:
Archives of Hydro-Engineering and Environmental Mechanics; 2017, 64, 1; 37-47
1231-3726
Pojawia się w:
Archives of Hydro-Engineering and Environmental Mechanics
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Performance Comparison of Stacked Dual-Metal Gate Engineered Cylindrical Surrounding Double-Gate MOSFET
Autorzy:
Dargar, Abha
Srivastava, Viranjay M.
Powiązania:
https://bibliotekanauki.pl/articles/1844602.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
short-channel effects
metal oxide semiconductor
transistor
cylindrical surrounding double-gate
dual-material gate
microelectronics
nanotechnology
Opis:
In this research work, a Cylindrical Surrounding Double-Gate (CSDG) MOSFET design in a stacked-Dual Metal Gate (DMG) architecture has been proposed to incorporate the ability of gate metal variation in channel field formation. Further, the internal gate's threshold voltage (VTH1) could be reduced compared to the external gate (VTH2) by arranging the gate metal work-function in Double Gate devices. Therefore, a device design of CSDG MOSFET has been realized to instigate the effect of Dual Metal Gate (DMG) stack architecture in the CSDG device. The comparison of device simulation shown optimized electric field and surface potential profile. The gradual decrease of metal work function towards the drain also improves the Drain Induced Barrier Lowering (DIBL) and subthreshold characteristics. The physics-based analysis of gate stack CSDG MOSFET that operates in saturation involving the analogy of cylindrical dual metal gates has been considered to evaluate the performance improvements. The insights obtained from the results using the gate-stack dual metal structure of CSDG are quite promising, which can serve as a guide to further reduce the threshold voltage roll-off, suppress the Hot Carrier Effects (HCEs) and Short Channel Effects (SCEs).
Źródło:
International Journal of Electronics and Telecommunications; 2021, 67, 1; 29-34
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
The Quantum Computer - What Does It Means?
Autorzy:
Kosiński, J.
Powiązania:
https://bibliotekanauki.pl/articles/92895.pdf
Data publikacji:
2007
Wydawca:
Uniwersytet Przyrodniczo-Humanistyczny w Siedlcach
Tematy:
qubit
quantum gate
quantum algorithm
quantum computation
Opis:
In a classical measurement the Shannon information is a natural measure of our ignorance about properties of a system. There, observation removes that ignorance in revealing properties of the system which can be considered to preexist prior to and independent of observation. Because of the completely different root of a quantum measurement as compared to a classical measurement, conceptual difficulties arise when we try to define the information gain in a quantum measurement using the notion of Shannon information. In contrast to classical measurements, quantum measurements, with very few exceptions, cannot be claimed to reveal a property of the individual quantum system existing before the measurement is performed. A mathematical theory of computation that is based on quantum physics is bound to be different. They are the analogues for quantum computers to classical logic gates for conventional digital computers. Although quantum gates work on qubits in a much different fashion from standard electronic circuits, they only differ in their basic effects in one sense: reversibility.
Źródło:
Studia Informatica : systems and information technology; 2007, 1(8); 77-96
1731-2264
Pojawia się w:
Studia Informatica : systems and information technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Realization of controlled NOT quantum gate via control of a two spin system
Autorzy:
Twardy, M.
Olszewski, D.
Powiązania:
https://bibliotekanauki.pl/articles/201766.pdf
Data publikacji:
2013
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
quantum gates control
CNOT gate
quantum control
Opis:
Physical realization of controlled NOT quantum gate is addressed as a control problem for the system of two interacting spins. The control is carried out by magnetic pulses acting on the spins. The shapes of the appropriate magnetic pulses are computed.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2013, 61, 2; 379-390
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Study of all-optical logic XOR gate based on linear optical amplifier cross-gain modulation
Autorzy:
Li, X
Jin, J
Li, H
Zhang, Q
Powiązania:
https://bibliotekanauki.pl/articles/174514.pdf
Data publikacji:
2015
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
linear optical amplifier
cross-gain modulation
XOR gate
Opis:
All-optical logic is the key to future high speed and large capacity optical transmission, the realization of optical packet switching and optical computing, and it has a very profound influence on the development of future optical communication. A linear optical amplifier as a new type of semiconductor optical amplifier, which has a good gain characteristic, has better signal performance than a traditional semiconductor optical amplifier in the wavelength conversion. This article presents a numerical simulation model of all-optical logic XOR gate and its logic operation based on cross-gain modulation of linear optical amplifier, and has also completed some of the basic logic operations, including AND, OR, NOT operations.
Źródło:
Optica Applicata; 2015, 45, 4; 447-457
0078-5466
1899-7015
Pojawia się w:
Optica Applicata
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An all optical majority gate using nonlinear photonic crystal based ring resonators
Autorzy:
Poursaleh, Amir
Andalib, Alireza
Powiązania:
https://bibliotekanauki.pl/articles/175120.pdf
Data publikacji:
2019
Wydawca:
Politechnika Wrocławska. Oficyna Wydawnicza Politechniki Wrocławskiej
Tematy:
majority gate
photonic crystal
Kerr effect
ring resonator
Opis:
Optical logics will play a crucial role in the next generation all optical data processing networks. Therefore an all optical majority gate will be designed by using nonlinear photonic crystal ring resonators. For realizing the proposed structure we need three nonlinear resonant rings. In order to make nonlinear resonant rings, we used chalcogenide glass as the dielectric material for the dielectric rods. The output port of the proposed structure will be active only when two or three logic input ports are active. The rise and fall time values of the proposed structure are about 2 and 1 ps, respectively. The total footprint of the proposed structure is about 1287 μm2.
Źródło:
Optica Applicata; 2019, 49, 3; 487-498
0078-5466
1899-7015
Pojawia się w:
Optica Applicata
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Lintel decoration types from the Temple of Hatshepsut at Deir el-Bahari and their meaning
Autorzy:
Madej, Adrianna
Powiązania:
https://bibliotekanauki.pl/articles/2033215.pdf
Data publikacji:
2021-12-31
Wydawca:
Uniwersytet Warszawski. Wydawnictwa Uniwersytetu Warszawskiego
Tematy:
lintel
decoration
gate
Hatshepsut temple
Deir el-Bahari
Opis:
Examination of the set of preserved gate lintels from the Temple of Hatshepsut in Deir el-Bahari has revealed two models of the iconographic decoration: one that emphasizes pictorial content in the form of scenes of a cultic or symbolic nature, with inscriptions playing merely a complementary role, and the other based on the textual message alone. The use of a given model of lintel decoration appears to be a measure either of the function of the room or, more broadly, of the space, accessed through the gate, or of the context of the wall decoration around the entrance.
Źródło:
Polish Archaeology in the Mediterranean; 2021, 30(1); 143-156
1234-5415
Pojawia się w:
Polish Archaeology in the Mediterranean
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Anthroponyms of the Polish-Czechborder area (The Moravian Gate)
Autorzy:
Mieczysław, BALOWSKI
Powiązania:
https://bibliotekanauki.pl/articles/909291.pdf
Data publikacji:
2020-09-15
Wydawca:
Uniwersytet im. Adama Mickiewicza w Poznaniu
Tematy:
Czech
Polish
comparative linguistics
anthroponyms
Moravian Gate
multiculturalism
Opis:
The author describes in the article project of researching the anthroponymy of the Polish-Czech borderland on the section of the Moravian Gate (Gorzyce – Krzyżanowice municipalities on the Polish side and Hať – Hilheřovice – Bohumín municipalities on the Czech side). The described borderland belongs to the so-called transitional borders, whose characteristic feature is the mixing of the population of two or more nations (or ethnic groups), and the effect of it is movement of the population in this area. As a result, the so-called third culture has developed, which had a major impact on the shape of names of the inhabitants, as well as on the choices of names for their children. Another factor in changing the form of surnames is the interference of an official who has often changed the spelling form of the surname in accordance with the language norm in force in his native language.
Źródło:
Bohemistyka; 2020, 4; 587-600
1642-9893
Pojawia się w:
Bohemistyka
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Study of electro-thermal stress of IGBT devices
Autorzy:
Shaban, M. A.
Ettomi, Y.
Powiązania:
https://bibliotekanauki.pl/articles/377956.pdf
Data publikacji:
2013
Wydawca:
Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
Tematy:
electro-thermal stress
IGBT
Insulated Gate Bipolar Transistor
Opis:
The aim of this paper is to present a new approach which consists to correlate or coupled the functional and electrical stress with temperature. This approach can be extremely useful in the predicting the stressing effect and the impact of IXGH-IGBT I-V characteristics on circuit degradation. Moreover, this new approach significantly improves such parameters likes (threshold voltage Vth, collector saturation current, the stress and enhanced collector leakage current) and provides new capability for use this power device IXGH-IGBT in an actual circuit environment and modules. We also explain the physical reasons behind the improvement obtained using functional electrical stress on the IGBTs for IXYS constructor with temperature. Moreover, the forward blocking capability of IXGH-IGBT under a coupled Functional - Electro stress at high temperature was analyzed using simulation. This paper gives a straight comparison in term of the stress for improving the switching speed of IGBT device. This study is essential to ensure product reliability and to the evaluation of hot carrier reliability in the early stages. Furthermore, our reliability study permits us to improve the implantation of the device in a circuit, as well as its use in industrial operating conditions. The need for good simulator (Spice, Spice) to carry out a reliability study is pointed out in this paper.
Źródło:
Poznan University of Technology Academic Journals. Electrical Engineering; 2013, 76; 275-284
1897-0737
Pojawia się w:
Poznan University of Technology Academic Journals. Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł

Ta witryna wykorzystuje pliki cookies do przechowywania informacji na Twoim komputerze. Pliki cookies stosujemy w celu świadczenia usług na najwyższym poziomie, w tym w sposób dostosowany do indywidualnych potrzeb. Korzystanie z witryny bez zmiany ustawień dotyczących cookies oznacza, że będą one zamieszczane w Twoim komputerze. W każdym momencie możesz dokonać zmiany ustawień dotyczących cookies