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Wyszukujesz frazę "Milik, A." wg kryterium: Autor


Wyświetlanie 1-4 z 4
Tytuł:
An Efficient Hardware Implementation of Smith-Waterman Algorithm Based on the Incremental Approach
Autorzy:
Pułka, A.
Milik, A.
Powiązania:
https://bibliotekanauki.pl/articles/227190.pdf
Data publikacji:
2011
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
DNA-tiles
pattern routing
pipelining
FPGA synthesis
parallelism and concurrency
reconfigurable systems
dynamic programming
systolic arrays
Opis:
The paper presents optimized hardware structure applied to genome alignment search. The proposed methodology is based on dynamic programming. The authors show how starting from the original Smith-Waterman approach, the algorithm can be optimized and the evaluation process simplified and speeded-up. The main idea is based on the observations of growth trends in the adjacent cells of the systolic array, which leads to the incremental approach. Moreover various coding styles are discussed and the best technique allowing further reduction of resources is selected. The entire processing unit utilizes fully pipelined structure that is well balanced trade-off between performance and resource requirements. The proposed technique is implemented in modern FPGA structures and obtained results proved efficiency of the methodology comparing to other approaches in the field.
Źródło:
International Journal of Electronics and Telecommunications; 2011, 57, 4; 489-496
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Measurement aspects of genome pattern investigations - hardware implementation
Autorzy:
Pułka, A.
Milik, A.
Powiązania:
https://bibliotekanauki.pl/articles/221637.pdf
Data publikacji:
2012
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
DNA-tiles
pattern recognition
pipelining
parallelism and concurrency
dynamic programming
systolic arrays
computational methods
Opis:
The work presented in the paper concerns a very important problem of searching for string alignments. The authors show that the problem of a genome pattern alignment could be interpreted and defined as a measuring task, where the distance between two (or more) patterns is investigated. The problem originates from modern computation biology. Hardware-based implementations have been driving out software solutions in the field recently. The complex programmable devices have become very commonly applied. The paper introduces a new, optimized approach based on the Smith-Waterman dynamic programming algorithm. The original algorithm is modified in order to simplify data-path processing and take advantage of the properties offered by FPGA devices. The results obtained with the proposed methodology allow to reduce the size of the functional block and radically speed up the processing time. This approach is very competitive compared with other related works.
Źródło:
Metrology and Measurement Systems; 2012, 19, 1; 49-62
0860-8229
Pojawia się w:
Metrology and Measurement Systems
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Synthesis and Implementation of Reconfigurable PLC on FPGA Platform
Autorzy:
Milik, A.
Hrynkiewicz, E.
Powiązania:
https://bibliotekanauki.pl/articles/226640.pdf
Data publikacji:
2012
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
PLC
LD
IL
FPGA
high level synthesis
logic synthesis
arithmetic circuits
reconfigurable hardware
Opis:
The paper presents a set of algorithms dedicated for synthesis of reconfigurable logic controllers implemented on FPGA platform and programmed according to IEC1131 and EN61131. The program is compiled to hardware structure with a massive parallel processing. The developed method automatically allocates resources and operations. It controls resource usage and operation timing. Using mixed concept of operation allocation that considers operation timing and forms combinatorial chains of operations number of execution cycles can be reduced. An example of logic functions, PID controller and mixed arithmetic and logic programming examples are considered. Introducing the automatic implementation method allows flexible implementing the control algorithms. The maximal possible parallelism (limited only by the algorithm dependencies and available resources) is introduced.
Źródło:
International Journal of Electronics and Telecommunications; 2012, 58, 1; 85-94
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
On the systematic method of conditional control program execution by a PLC
Autorzy:
Milik, A.
Chmiel, M.
Hrynkiewicz, E.
Powiązania:
https://bibliotekanauki.pl/articles/201968.pdf
Data publikacji:
2016
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
control program
PLC
LD
IL
FPGA
compiler
control program optimization
PLC programming
flow graph
program sterujący
kompilator
kontrola
optymalizacja oprogramowania
programowanie sterowników PLC
wykres przepływu
Opis:
The paper presents an original idea of the selective control program execution that allows significant response time reduction. The exhaustive analysis of the PLC program performance is given. An analytic approach explains the idea of the selective control program evaluation and gives the requirements for its feasibility. There is presented a systematic and formal method of program analysis based on a data flow graph approach. The method generates acyclic graph from the control program that is subject of optimization, variable allocation and instruction generation. The graph approach allows determining variables dependencies and task partitioning required by selective program execution. The method utilize the hardware supported variable changes detection. It is transparent for system operation and enables evaluation of blocks that require update.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2016, 64, 1; 161-170
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-4 z 4

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