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Wyszukujesz frazę "modulator Sigma-Delta" wg kryterium: Temat


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Tytuł:
Analiza własności metrologicznych przetworników A/D zbudowanych na bazie modulatorów sigma-delta różnych rzędów
Metrological analysis of A/D converters with sigma-delta modulators of different orders
Autorzy:
Sidor, T.
Powiązania:
https://bibliotekanauki.pl/articles/156804.pdf
Data publikacji:
2014
Wydawca:
Stowarzyszenie Inżynierów i Techników Mechaników Polskich
Tematy:
modulator sigma-delta
przetwornik A/D
błąd kwantyzacji
A/D converters
sigma-delta modulators
quantization errors
Opis:
W artykule porównano własności metrologiczne przetworników A/D z modulatorami sigma-delta pierwszego i drugiego rzędu stosując analizę w dziedzinie czasu. Wykazano, że przetworniki z modulatorami wyższych rzędów, wykazują w istocie ten sam poziom błędów kwantowania, co przetworniki z modulatorem pierwszego rzędu. Zwrócono również uwagę na istotne niekonsekwencje, pojawiające się w licznych opracowaniach na ten temat, które posługują się analizą w dziedzinie częstotliwości.
In this paper the time domain analysis is used to compare metrological properties of sigma-delta A/D converters with first order modulator and converters with modulators of higher order. Modulators of higher orders are widely advertised for such converters to be used in digital acoustic systems. The paper proves that from the viewpoint of the important metrological property of such converters i.e. the level of quantization error there is no superiority in performance of A/D converters with higher order modulators over converters with modulator of first order. It was confirmed by a simulation experiment, performed using the MICROCAP circuit simulator (Figs. 7 and 8), where the quantization error levels were compared for modulators of first and second order. Moreover, there is pointed out a certain inconsistency present in numerous papers [2, 4, 5] in which the frequency domain analysis is used to explain noise shaping phenomenon. There is no direct digital filtration possible straight at the sigma-delta modulator output and decimation afterwards. In fact both actions are performed by a single counter, which can be described as both, basically decimator and digital filter (Fig.6).
Źródło:
Pomiary Automatyka Kontrola; 2014, R. 60, nr 2, 2; 94-97
0032-4140
Pojawia się w:
Pomiary Automatyka Kontrola
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Rapid design exploration of low pass highly efficient single loop single bit sigma delta (ΣΔ) modulators
Autorzy:
Krishna, S. Vamsee
Reddy, P. Sudhakara
Reddy, S. Chandra Mohan
Powiązania:
https://bibliotekanauki.pl/articles/38699542.pdf
Data publikacji:
2023
Wydawca:
Instytut Podstawowych Problemów Techniki PAN
Tematy:
sigma delta modulator
single loop
time domain
virtual instrument
biomedical application
modulator sigma delta
pojedyncza pętla
dziedzina czasu
instrument wirtualny
zastosowanie biomedyczne
Opis:
A rapid design and verification of sigma delta modulators are presented at the systemlevel with high accuracy and computational efficiency. Sigma delta analog to digital converters showcased an excellent choice for low bandwidth applications from near DC tohigh bandwidth standard 5G applications. The conceptualization of the graphical userinterface (GUI) in the efficient selection of integrator weights has been proposed, whichsolves various tradeoffs between various abstraction levels. The sigma delta modulator of the 5th order is designed and simulated using the proposed design methodology of calculating integrator weights for targeted specifications. The efficiency of design explorationand optimum selection of integrator coefficients has been investigated on single loop architectures. Power and performance of the selected modulator has been verified in the timedomain behavioral simulation. The discrete time circuit technique has been adopted fordesign of distributed feedback, feed forward architectures and comparison of performancemetrics done between selected architectures. A huge design space is computed for the bestdesign parameters that offers ultra-low power and high performance. The proposed virtual instruments supported the methodology for designing delta sigma modulators at thesystem level achieving SNDR of 122 dB over a bandwidth of 5 kHz at a clock frequencyof 1 MHz.
Źródło:
Computer Assisted Methods in Engineering and Science; 2023, 30, 1; 27-39
2299-3649
Pojawia się w:
Computer Assisted Methods in Engineering and Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An active power filter based on a hybrid converter topology – Part 1
Autorzy:
Gwóźdź, Michał
Ciepliński, Łukasz
Powiązania:
https://bibliotekanauki.pl/articles/2173586.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
shunt active power filter
pulse width modulation
PWM
sigma-delta modulator
silicon carbide
bocznikowy filtr mocy czynnej
modulacja szerokości impulsu
modulator sigma-delta
węglik krzemu
Opis:
This paper presents a concept of a shunt active power filter, which is able to provide more precise mapping of its input current drawn from a power line in a reference signal, as compared to a typical filter solution. It can be achieved by means of an interconnection of two separate power electronics converters making, as a whole, a controlled current source, which mainly determines the quality of the shunt active filter operation. One of these power devices, the “auxiliary converter”, corrects the total output current, being a sum of output currents of both converters, toward the reference signal. The rated output power of the auxiliary converter is much lower than the output power of the main one, while its frequency response is extended. Thanks to both these properties and the operation of the auxiliary converter in a continuous mode, pulse modulation components in the filter input current are minimized. Benefits of the filter are paid for by a relatively small increase in the complexity and cost of the system. The proposed solution can be especially attractive for devices with higher output power, where, due to dynamic power loss in power switches, a pulse modulation carrier frequency must be lowered, leading to the limitation of the “frequency response” of the converter. The concept of such a system was called the “hybrid converter topology”. In the first part of the paper, the rules of operation of the active filter based on this topology are presented. Also, the results of comparative studies of filter simulation models based on both typical, i.e. single converter, and hybrid converter topologies, are discussed.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 1; art. no. e136218
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Monolityczne układy konwerterów sigma-delta do pomiaru wartości skutecznej napięcia i ich porównanie ze scalonymi konwerterami klasycznymi
The present monolithic sigma-delta converters for root-mean-square voltage measurement and their comparison to classic monolithic integrated RMS converters
Autorzy:
Korytkowski, J.
Powiązania:
https://bibliotekanauki.pl/articles/277296.pdf
Data publikacji:
2012
Wydawca:
Sieć Badawcza Łukasiewicz - Przemysłowy Instytut Automatyki i Pomiarów
Tematy:
element monolityczny
elektroniczny układ pomiarowy
modulator sigma-delta
pomiar wartości skutecznej napięcia
monolithic element
electronic measuring circuit
sigma-delta modulator
root-mean-square voltage measurement
Opis:
W pracy omówiono zasadę działania współczesnych monolitycznych układów konwerterów sigma-delta stosowanych do formowania analogowego sygnału pomiarowego o wartości skutecznej napięcia. Dokonano przeglądu właściwości monolitycznych układów konwerterów sigma-delta do pomiaru wartości skutecznej napięcia i porównano z właściwościami monolitycznych klasycznych konwerterów stosowanych do takich pomiarów. Istotnymi zaletami monolitycznych układów konwerterów sigma-delta do pomiaru wartości skutecznej są: duża dokładność formowania analogowego wyjściowego sygnału pomiarowego, bardzo mały pobór mocy na wejściu oraz szerokie pasmo częstotliwościowe mierzonego napięcia wejściowego.
The monolithic sigma-delta converters are very useful for measurement root-mean-square time-varying voltage circuits. The fig. 1 shows converter block diagram, which got possibility to describe the mathematical function for calculation RMS value of input AC voltage. The fig. 2 shows block diagram of multiplier-divider circuit containing identical two controlled elements having the very same controlled amplification. In the fig. 3 is shown the circuit diagram of sigma-delta modulator and characteristic of comparator, which is a part of the modulator. According to fig. 3 was formulated equation (15) as the characteristic description of multiplier-divider circuits, which is the main element of sigma-delta true RMS converter for input voltage measurement. The part 3 of this paper describes the parameters review of monolithic RMS converters. The table 1 presents the parameter values of selected group RMS converters, which are delivered by several much known firms. The converters parameters analysis shows, that monolithic sigma-delta converters have very good qualities in the parameter field of accuracy, minimal signal power consumption and wide frequency band of input measurement signals.
Źródło:
Pomiary Automatyka Robotyka; 2012, 16, 7-8; 84-89
1427-9126
Pojawia się w:
Pomiary Automatyka Robotyka
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An active power filter based on a hybrid converter topology – Part 1
Autorzy:
Gwóźdź, Michał
Ciepliński, Łukasz
Powiązania:
https://bibliotekanauki.pl/articles/2090725.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
shunt active power filter
pulse width modulation
PWM
sigma-delta modulator
silicon carbide
bocznikowy filtr mocy czynnej
modulacja szerokości impulsu
modulator sigma-delta
węglik krzemu
Opis:
This paper presents a concept of a shunt active power filter, which is able to provide more precise mapping of its input current drawn from a power line in a reference signal, as compared to a typical filter solution. It can be achieved by means of an interconnection of two separate power electronics converters making, as a whole, a controlled current source, which mainly determines the quality of the shunt active filter operation. One of these power devices, the “auxiliary converter”, corrects the total output current, being a sum of output currents of both converters, toward the reference signal. The rated output power of the auxiliary converter is much lower than the output power of the main one, while its frequency response is extended. Thanks to both these properties and the operation of the auxiliary converter in a continuous mode, pulse modulation components in the filter input current are minimized. Benefits of the filter are paid for by a relatively small increase in the complexity and cost of the system. The proposed solution can be especially attractive for devices with higher output power, where, due to dynamic power loss in power switches, a pulse modulation carrier frequency must be lowered, leading to the limitation of the “frequency response” of the converter. The concept of such a system was called the “hybrid converter topology”. In the first part of the paper, the rules of operation of the active filter based on this topology are presented. Also, the results of comparative studies of filter simulation models based on both typical, i.e. single converter, and hybrid converter topologies, are discussed.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 1; e136218, 1--10
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Switched Current Sigma-Delta Modulator with a New Comparator Structure Designed Based on VHDL-AMS Description
Autorzy:
Śniatała, P
Handkiewicz, A
Naumowicz, M.
Szczęsny, S.
Melosik, M.
Katarzyński, P.
Kropidłowski, M.
Powiązania:
https://bibliotekanauki.pl/articles/227188.pdf
Data publikacji:
2013
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
switched current
VHDL-AMS
sigma-delta modulator
Opis:
The paper presents a VHDL-AMS based approach to the Switched-Current (SI) Sigma-Delta Modulator design. The prototype VHDL-AMS description, with the help of elaborated EDA tools, is automatically translated into the SI realization. Another tool helps the designer to create the layout. The paper also describes a new current mode comparator, which is used in the design. Postlayout simulation results are presented.
Źródło:
International Journal of Electronics and Telecommunications; 2013, 59, 4; 391-396
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Polyphase Comb Filter Based on Dispatching Input Bit-stream and Interlaying Multiplexer Techniques for Sigma-Delta ADCs
Autorzy:
Abdollahvand, S.
Goes, J.
Paulino, N.
Gomes, L.
Powiązania:
https://bibliotekanauki.pl/articles/397961.pdf
Data publikacji:
2012
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
filtr decymacyjny
filtr wielofazowy
modulator sigma-delta
field-programmable gate array
FPGA
decimation filter
Polyphase Comb filter
sigma-delta modulators
field programmable gate array (FPGA)
Opis:
This paper describes a new design approach for implementing a Polyphase Comb Filter (PCF) based on dispatching input bit-stream and interlaying multiplexer techniques. In order to make our solution more energy efficient in comparison with prior art, we start with a detailed analysis of the drawbacks and advantages of the existing classical techniques. A new structure based on a novel SINC3 design is proposed. This new design uses a controller unit to activate one sub-filter in each specific time interval. As a consequence, no input registers and switches are required. Since this decimation filter is working with a single-bit output bit-stream, the required multiplication function can be simply done by using interlaying multiplexers (MUXs). By interlaying different levels of MUXs along with the navigation of the input bit stream we can easily emulate the multiplication operation. The implementation in a Xilinx Spartan3 FPGA demonstrates the feasibility and hardware efficiency of our solution . The proposed new filter architecture can be readily applicable to any Sigma-Delta (ΣΔ) ADC with a single-bit output stream and it requires a reduced number of adders and registers when compared with the state-of-the-art approaches.
Źródło:
International Journal of Microelectronics and Computer Science; 2012, 3, 4; 152-158
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Optymalizacja przetworników A/D typu Sigma-Delta dla systemów pomiarowych i akustycznych
Structural Optimalisation of A/D Sigma-Delta Converters for Metrological and Acoustic Systems
Autorzy:
Sidor, T.
Powiązania:
https://bibliotekanauki.pl/articles/276929.pdf
Data publikacji:
2018
Wydawca:
Sieć Badawcza Łukasiewicz - Przemysłowy Instytut Automatyki i Pomiarów
Tematy:
przetwornik A/D
modulator Sigma-Delta
nadpróbkowanie
szum kwantowania
stosunek sygnału do szumu S/N
A/D converter
S-D modulator
oversampling
quantizing errors
S/N ratio
Opis:
Przetworniki A/D są niezbędne we współczesnych systemach automatyki, wykorzystujących sterowanie komputerowe. Chociaż przetworniki typu Sigma-Delta są obecnie powszechnie stosowane w układach rejestracji cyfrowej sygnałów akustycznych, to m.in. ze względu na ich popularność mogą być również używane w systemach pomiarowych. Jednak wymagania co do jakości przetwarzania przetworników A/D są inne dla zastosowań w systemach akustycznych i pomiarowych, co wynika z diametralnie różnej dynamiki przetwarzanych sygnałów i różnych kryteriów oceny jakości. Niniejszy artykuł ma na celu przybliżenie problematyki optymalizacji struktur takich przetworników dla aplikacji w systemach akustycznych i pomiarowych.
A/D converters of any type are indispensable in contemporary control systems, employing digital computers. Although converters of Sigma-Delta type are nowadays very common in systems for digital recording of acoustic signals, because they are very popular, can also be used in measurement systems. Quality requirements for both type of applications are different, as acoustic type signals and measurement signals have totally different dynamic and different criteria are used to assess converter performance in each case. This paper attempts to point out certain means used to optimize structures of such converters for acoustic and metrological applications.
Źródło:
Pomiary Automatyka Robotyka; 2018, 22, 2; 17-22
1427-9126
Pojawia się w:
Pomiary Automatyka Robotyka
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Analysis and Design of a First - Order Delta-Sigma Modulator based on Ultra Incomplete Settling and Considering Non-ideal Effects
Autorzy:
Nowacki, B.
Paulino, N.
Goes, J.
Powiązania:
https://bibliotekanauki.pl/articles/397918.pdf
Data publikacji:
2012
Wydawca:
Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:
modulator Delta-Sigma
integrator bierny
konwersja analogowo-cyfrowa
konwersja A/D
filtr S.C.
delta-sigma modulator
passive integrator
analog-to-digital conversion
A/D conversion
passive SC filter
Opis:
One of the main building blocks of a Delta-Sigma modulator (ΔΣ?) is the integrator circuit. Usually this is implemented either in discrete or in continuous time domains using amplifiers. This paper analyses a ΔΣcircuit based on the implementation of passive switched-capacitor (SC) integrator using ultra incomplete settling. The behavior of a 1st order ΔΣ? is fully analyzed and explained, as well as its non-ideal effects, which become more significant for higher clock frequencies. This work compares performance of ΔΣM clocked with Fclk=100 MHz and Fclk=300 MHz. Electrical simulations show that the ΔΣM (Fclk=300 MHz) achieves a peak signal-to-noise-plus-distortion ratio (SNDR) of 67.5 dB, a peak signal-to-noise ratio (SNR) of 69.7 dB for a signal with a bandwidth (BW) of 400 kHz, while dissipating only 232μW from a 1.1 V power supply voltage, resulting in a figure-of-merit (FOM) of 165 fJ/conv.-step (simulated).
Źródło:
International Journal of Microelectronics and Computer Science; 2012, 3, 4; 125-131
2080-8755
2353-9607
Pojawia się w:
International Journal of Microelectronics and Computer Science
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Sampling Jitter in Audio A/D Converters
Autorzy:
Kulka, Z.
Powiązania:
https://bibliotekanauki.pl/articles/177046.pdf
Data publikacji:
2011
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
analog-to-digital converter
ADC
successive approximation register (SAR)
sigma-delta ADC
sample-and-hold circuit
DT sigma delta modulator
CT sigma delta modulator
time jitter
aperture jitter
clock jitter
periodic clock jitter
signal-to-noise ratio (SNR)
Opis:
This paper provides an overview of the effects of timing jitter in audio sampling analog-to-digital converters (ADCs), i.e. PCM (conventional or Nyquist sampling) ADCs and sigma-delta (ΣΔ) ADCs. Jitter in a digital audio is often defined as short- term fluctuations of the sampling instants of a digital signal from their ideal positions in time. The influence of the jitter increases particularly with the improvements in both resolution and sampling rate of today’s audio ADCs. At higher frequencies of the input signals the sampling jitter becomes a dominant factor in limiting the ADCs performance in terms of signal-to-noise ratio (SNR) and dynamic range (DR).
Źródło:
Archives of Acoustics; 2011, 36, 4; 831-849
0137-5075
Pojawia się w:
Archives of Acoustics
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-10 z 10

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