Temat: VHDL-AMS - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Switched Current Sigma-Delta Modulator with a New Comparator Structure Designed Based on VHDL-AMS Description
Autorzy:: Śniatała, P
Handkiewicz, A
Naumowicz, M.
Szczęsny, S.
Melosik, M.
Katarzyński, P.
Kropidłowski, M.
Powiązania:: https://bibliotekanauki.pl/articles/227188.pdf
Data publikacji:: 2013
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: switched current
VHDL-AMS
sigma-delta modulator
Opis:: The paper presents a VHDL-AMS based approach to the Switched-Current (SI) Sigma-Delta Modulator design. The prototype VHDL-AMS description, with the help of elaborated EDA tools, is automatically translated into the SI realization. Another tool helps the designer to create the layout. The paper also describes a new current mode comparator, which is used in the design. Postlayout simulation results are presented.
Źródło:: International Journal of Electronics and Telecommunications; 2013, 59, 4; 391-396
2300-1933
Pojawia się w:: International Journal of Electronics and Telecommunications
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 2.

Tytuł:: Development of the basic acoustic elements models on the base of the VHDL – AMS language for computer-aided design at the schemotechnical level
Autorzy:: Teslyuk, V.
Holovatyy, A.
Alshawabkeh, H. A.
Powiązania:: https://bibliotekanauki.pl/articles/410618.pdf
Data publikacji:: 2018
Wydawca:: Polska Akademia Nauk. Oddział w Lublinie PAN
Tematy:: microelectromechanical systems (MEMS)
VHDL-AMS model
basic acoustic element
schematic design level
Opis:: In this paper the basic acoustic elements models are developed on the base of the VHDL-AMS language. Constructed models are based on the thin plates theory and are intended to be used in computer-aided design at the schematic level of basic acoustic MEMS elements. The results of the models for basic acoustic elements of piezoelectric and electrostatic types investigation are also presented.
Źródło:: ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes; 2018, 7, 2; 53-58
2084-5715
Pojawia się w:: ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 3.

Tytuł:: VHDL-AMS Models for Current Conveyor Based Monolithic Operational Amplifiers
Autorzy:: Pandiev, Ivailo M.
Powiązania:: https://bibliotekanauki.pl/articles/398082.pdf
Data publikacji:: 2018
Wydawca:: Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:: analog circuits
CCII
CCCII
CFOA
integrated circuit modelling
VHDL-AMS
circuit simulation
układy analogowe
symulacja obwodowa
Opis:: This paper focuses on analysis and behavioral modeling of second generation positive and negative current conveyors (CCII+s, CCII‒s), as well current-controlled current conveyors (CCCIIs). On the basis of the proposed CCII+ model improved behavioral models for three-terminal and four-termi-nal monolithic CFOAs are created. The models are developed by using VHDL analog and mixed-signal (VHDL-AMS) language and the descriptions are adapted to the SystemVision (version 5.5) simulation program, which is a part of the Mentor Graphics system. The proposed models simulate static and dynamic para-meters for differential and common-mode input signals at room temperature, including the parameters input offsets, accurate input impedances, non-dominant poles at differential input signals, AC common-mode rejection, PSRR effects, output impe-dances, slew rate limiting and terminal voltage/current operating ranges. The modeling parameters are extracted for commercially available four-terminal CFOA AD844A and CCCII OPA860 by analyzing semiconductor data books or through characterization measurements. For the validation process simulation and experi-mental results for sample electronic circuits are given.
Źródło:: International Journal of Microelectronics and Computer Science; 2018, 9, 1; 34-46
2080-8755
2353-9607
Pojawia się w:: International Journal of Microelectronics and Computer Science
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 4.

Tytuł:: VHDL-Ams Model of the Integrated Membrane Micro-Accelerometer with Delta-Sigma (Δσ) Analog-To-Digital Converter for Schematic Design Level
Autorzy:: Golovatyj, А.
Teslyuk, V.
Kryvyy, R.
Powiązania:: https://bibliotekanauki.pl/articles/411400.pdf
Data publikacji:: 2015
Wydawca:: Polska Akademia Nauk. Oddział w Lublinie PAN
Tematy:: Micro-Electro-Mechanical Systems (MEMS)
micromechanical sensitive element
integrated membrane micro-accelerometer
delta-sigma modulation
pulse width modulation (PWM)
delta-sigma analog-todigital converter (ADC)
one bit digital-to-analog converter (DAC)
VHDL-AMS hardware description language
hAMSter software
schemotechnical design level
Opis:: VHDL-Ams model of integrated membrane type micro-accelerometer with delta-sigma (ΔΣ) analog-to-digital converter for schematic design level was developed. It allows simulating movement of the sensitive element working weigh from the applied acceleration, differential capacitor and original signal capacity change, signal digitizing with the help of DeltaSigma ADC with defined micro-accelerometer structural parameters, and analyzze an integrated device at the schemotechnical design level.
Źródło:: ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes; 2015, 4, 2; 65-70
2084-5715
Pojawia się w:: ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes
Dostawca treści:: Biblioteka Nauki

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