Wszystkie pola: vision processing - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: CMOS realisation of analogue processor for early vision processing
Autorzy:: Jendernalik, W.
Jakusz, J.
Blakiewicz, G.
Piotrowski, R.
Szczepański, S.
Powiązania:: https://bibliotekanauki.pl/articles/202320.pdf
Data publikacji:: 2011
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: CMOS imager
analogue processor array
smart sensor
vision chip
Opis:: The architecture concept of a high-speed low-power analogue vision chip, which performs low-level real-time image algorithms is presented. The proof-of-concept prototype vision chip containing 32 �~ 32 photosensor array and 32 analogue processors is fabricated using a 0.35 mikrom CMOS technology. The prototype can be configured to register and process images with very high speed, reaching 2000 frames per second, or achieve very low power consumption, several mikroW. Finally, the experimental results are presented and discussed.
Źródło:: Bulletin of the Polish Academy of Sciences. Technical Sciences; 2011, 59, 2; 141-147
0239-7528
Pojawia się w:: Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 2.

Tytuł:: Characteristics of an image sensor with early-vision processing fabricated in standard 0.35 žm CMOS technology
Autorzy:: Jendernalik, W.
Jakusz, J.
Blakiewicz, G.
Szczepański, S.
Piotrowski, R.
Powiązania:: https://bibliotekanauki.pl/articles/220599.pdf
Data publikacji:: 2012
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: CMOS imager
analogue processor array
smart sensor
vision chip
Opis:: The article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 žm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image processing algorithms. The prototype with a resolution of 32 x 32 pixels allows the acquisition and processing of images at high speed, up to 2000 frames/s. Operation of the prototypes was verified in practice using the developed software and a measurement system based on a FPGA platform.
Źródło:: Metrology and Measurement Systems; 2012, 19, 2; 191-202
0860-8229
Pojawia się w:: Metrology and Measurement Systems
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 3.

Tytuł:: Analogue CMOS ASICs in image processing systems
Autorzy:: Jendernalik, W.
Blakiewicz, G.
Handkiewicz, A.
Melosik, M.
Powiązania:: https://bibliotekanauki.pl/articles/221661.pdf
Data publikacji:: 2013
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: analog CMOS circuits
early vision processing
switched current filters
Opis:: In this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs) fabricated in complementary metal oxide semiconductor (CMOS) technologies. While discussing the vision chip realizations the importance of low-cost, low-power solutions is highlighted, which are increasingly being used in intelligent consumer equipment. Thanks to the great development of the automated design environments and fabrication methods, new, so far unknown applications of the vision chips become possible, as for example disposable endoscopy capsules for photographing the human gastrointestinal tract for the purposes of medical diagnosis.
Źródło:: Metrology and Measurement Systems; 2013, 20, 4; 613-622
0860-8229
Pojawia się w:: Metrology and Measurement Systems
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 4.

Tytuł:: CMOS implementation of an analogue median filter for image processing in real time
Autorzy:: Jendernalik, W.
Jakusz, J.
Blakiewicz, G.
Szczepański, S.
Powiązania:: https://bibliotekanauki.pl/articles/202129.pdf
Data publikacji:: 2013
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: analogue CMOS circuits
early vision processing
median filter
low-power
Opis:: An analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of analogue pre-processors, and interface circuits. The analysis of the main parameters of the considered median filter is presented. The discussion of important limitations in the operation of the filter due to the restrictions imposed by CMOS technology is also presented.
Źródło:: Bulletin of the Polish Academy of Sciences. Technical Sciences; 2013, 61, 3; 725-730
0239-7528
Pojawia się w:: Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:: Biblioteka Nauki

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