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    Wyświetlanie 1-4 z 4
    Tytuł:
    Design of fuzzy rule-based classifiers through granulation and consolidation
    Autorzy:
    Riid, A.
    Preden, J.-S.
    Powiązania:
    https://bibliotekanauki.pl/articles/91638.pdf
    Data publikacji:
    2017
    Wydawca:
    Społeczna Akademia Nauk w Łodzi. Polskie Towarzystwo Sieci Neuronowych
    Tematy:
    pattern recognition
    fuzzy classification
    complexity reduction
    Opis:
    This paper addresses the issue how to strike a good balance between accuracy and compactness in classification systems - still an important question in machine learning and data mining. The fuzzy rule-based classification approach proposed in current paper exploits the method of rule granulation for error reduction and the method of rule consolidation for complexity reduction. The cooperative nature of those methods - the rules are split in a way that makes efficient rule consolidation feasible and rule consolidation itself is capable of further error reduction - is demonstrated in a number of experiments with nine benchmark classification problems. Further complexity reduction, if necessary, is provided by rule compression.
    Źródło:
    Journal of Artificial Intelligence and Soft Computing Research; 2017, 7, 2; 137-147
    2083-2567
    2449-6499
    Pojawia się w:
    Journal of Artificial Intelligence and Soft Computing Research
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    An Efficient Early Iteration Termination for Turbo Decoder
    Autorzy:
    Salija, P.
    Yamuna, B.
    Powiązania:
    https://bibliotekanauki.pl/articles/958052.pdf
    Data publikacji:
    2016
    Wydawca:
    Instytut Łączności - Państwowy Instytut Badawczy
    Tematy:
    early termination
    complexity reduction
    mean of extrinsic information
    turbo decoder
    Opis:
    Turbo code finds wide applications in mobile communication, deep space communication, satellite communication and short-range communication despite its high computational complexity and iterative nature. Realizing capacity approaching turbo code is a great achievement in the field of communication systems due to its efficient error correction capability. The high computational complexity associated with the iterative process of decoding turbo code consumes large power, introducing decoding delay, and reducing the throughput. Hence, efficient iteration control techniques are required to make the turbo code more power efficient. In this paper, a simple and efficient early iteration termination technique is introduced based on absolute value of the mean of extrinsic information at the component decoders of turbo code. The simulation results presented clearly show that the proposed method is capable of reducing the average number of iterations while maintaining performance close to that of fixed iteration termination. The significant reduction in iteration achieved by the method reduces decoding delay and complexity while maintaining Bit Error Rate performance close to standard fixed iteration turbo decoder.
    Źródło:
    Journal of Telecommunications and Information Technology; 2016, 2; 113-122
    1509-4553
    1899-8852
    Pojawia się w:
    Journal of Telecommunications and Information Technology
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Basic Aspects of Designing a High-performance Processor Structure for Calculating a "true" Discrete Fractional Fourier Transform
    Autorzy:
    Cariow, A.
    Majorkowska-Mech, D.
    Powiązania:
    https://bibliotekanauki.pl/articles/114579.pdf
    Data publikacji:
    2018
    Wydawca:
    Stowarzyszenie Inżynierów i Techników Mechaników Polskich
    Tematy:
    discrete fractional Fourier transform
    parallelization of computations
    hardware implementation
    complexity reduction
    Opis:
    This paper presents a basic aspects of structural design of the highperformance processor for implementation of discrete fractional Fourier transform (DFrFT). The general idea of the possibility of parallelizing the calculation of the so-called “true” discrete Fourier transform on the basis of our previously developed algorithmic approach is presented. We specifically focused only on the general aspects of the organization of the structure of such a processor, since the details of a particular implementation always depend on the implementation platform used, while the general idea of constructing the structure of the processor remains unchanged.
    Źródło:
    Measurement Automation Monitoring; 2018, 64, 2; 43-45
    2450-2855
    Pojawia się w:
    Measurement Automation Monitoring
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Efficient Schur Parametrization and Modeling of p-Stationary Second-Order Time-Series for LPC Transmission
    Autorzy:
    Wielgus, A.
    Zarzycki, J.
    Powiązania:
    https://bibliotekanauki.pl/articles/226070.pdf
    Data publikacji:
    2018
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    second-order nonstationary time-series
    linear Schur parametrization/modeling
    complexity reduction
    Opis:
    Following the results presented in [21], we present an efficient approach to the Schur parametrization/modeling of a subclass of second-order time-series which we term p-stationary time-series, yielding a uniform hierarchy of algorithms suitable for efficient implementations and being a good starting point for nonlinear generalizations to higher-order non-Gaussian nearstationary time-series.
    Źródło:
    International Journal of Electronics and Telecommunications; 2018, 64, 3; 343-350
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-4 z 4

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