Temat: inductor - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Analytical and experimental determination of the parasitic parameters in high-frequency inductor
Autorzy:: Zdanowski, M.
Barlik, R.
Powiązania:: https://bibliotekanauki.pl/articles/200393.pdf
Data publikacji:: 2017
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: model of inductor circuit
interlayer capacitance
parallel resonance
litz wire
inductor winding
skin effect
pojemność pośrednia
rezonans równoległy
cewka indukcyjna
Opis:: The paper presents the results of calculations, simulations, and measurements of parasitic capacitance of winding in ferrite inductor suitable for cooperating with 2 kW DC-DC boost converter built using SiC JFET transistors, operating with a switching frequency of 100 kHz. The inductor winding is made of litz wire in a two-layer configuration. The lumped model of inductor winding was adopted. The results of analytical calculations have been compared with the results obtained from experimental investigations based on the resonance effect.
Źródło:: Bulletin of the Polish Academy of Sciences. Technical Sciences; 2017, 65, 1; 107-112
0239-7528
Pojawia się w:: Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Verilog-A inductor compact model for the efficient simulation of Class-D VCOs
Autorzy:: Fino, M. H.
Powiązania:: https://bibliotekanauki.pl/articles/397955.pdf
Data publikacji:: 2016
Wydawca:: Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
Tematy:: Verilog-A
RF modeling
tapered Inductor
Class D Oscillator
modelowanie RF
cewka indukcyjna
oscylator
Opis:: This paper presents the use of a Verilog-A compact model for integrated spiral inductors, for the simulation of Class-D CMOS oscillators. The model takes into consideration the geometric parameters characterizing the inductor layout, as well as the technological parameters. The accuracy of the model is checked against simulations with ASITIC simulator and limitations of the model are established. The model is integrated into Cadence environment, offering the designer the possibility to efficiently simulate radio frequency blocks considering the non-idealities of both the inductors and the transistors in nanometric technologies. The particular case for a class-D oscillator is illustrated.
Źródło:: International Journal of Microelectronics and Computer Science; 2016, 7, 3; 114-118
2080-8755
2353-9607
Pojawia się w:: International Journal of Microelectronics and Computer Science
Dostawca treści:: Biblioteka Nauki

Artykuł

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