Temat: SOI - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Silicon microelectronics: where we have come from and where we are heading
Autorzy:: Łukasiak, L.
Jakubowski, A.
Pióro, Z.
Powiązania:: https://bibliotekanauki.pl/articles/308029.pdf
Data publikacji:: 2004
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: MOSFET
scaling
SiGe
SOI
Opis:: The paper briefly presents the history of microelectronics and the limitations of its further progress, as well as possible solutions. The discussion includes the consequences of the reduction of gate-stack capacitance and difficulties associated with supply-voltage scaling, minimization of parasitic resistance, increased channel doping and small size. Novel device architectures (e.g. SON, double-gate transistor) and the advantages of silicon-germanium are considered, too.
Źródło:: Journal of Telecommunications and Information Technology; 2004, 1; 7-14
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 2.

Tytuł:: High-temperature instability processes in SOI structures and MOSFETs
Autorzy:: Nazarov, A.N.
Kilchytska, V.I.
Vovk, Ja.N.
Colinge, J.P.
Powiązania:: https://bibliotekanauki.pl/articles/307654.pdf
Data publikacji:: 2001
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: SOI
MOSFET
high-temperature
instability
ZMR
SIMOX
Opis:: The paper reviews the problems related to BOX high-temperature instability in SOI structures and MOSFETs. The methods of bias-temperature research applied to SOI structures and SOI MOSFETs are analysed and the results of combined electrical studies of ZMR, and SIMOX SOI structures are presented. The studies are focused mainly on electrical discharging processes in the BOX at high temperature and its link with new instability phenomena such as high-temperature kink effects in SOI MOSFETs.
Źródło:: Journal of Telecommunications and Information Technology; 2001, 1; 18-26
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 3.

Tytuł:: On-wafer wideband characterization: a powerful tool for improving the IC technologies
Autorzy:: Lederer, D.
Raskin, J. P.
Powiązania:: https://bibliotekanauki.pl/articles/308775.pdf
Data publikacji:: 2007
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: silicon-on-insulator (SOI)
MOSFET
wideband characterization
microwave frequency
extraction techniques
small-signal equivalent circuit
Opis:: In the present paper, the interest of wideband characterization for the development of integrated technologies is highlighted through several advanced devices, such as 120 nm partially depleted (PD) silicon-on-insulator (SOI) MOSFETs, 120 nm dynamic threshold (DT) voltage - SOI MOSFETs, 50 nm FinFETs as well as long-channel planar double gate (DG) MOSFETs.
Źródło:: Journal of Telecommunications and Information Technology; 2007, 2; 69-77
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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Skocz do pozycji: 4.

Tytuł:: Special size effects in advanced single-gate and multiple-gate SOI transistors
Autorzy:: Ohata, A.
Ritzenthaler, R.
Faynot, O.
Cristoloveanu, S.
Powiązania:: https://bibliotekanauki.pl/articles/308994.pdf
Data publikacji:: 2007
Wydawca:: Instytut Łączności - Państwowy Instytut Badawczy
Tematy:: MOSFET
SOI
ultra-thin silicon
multiple-gate
mobility
coupling effect
thin gate oxide
gate-induced floating body effect
drain-induced virtual substrate biasing
Opis:: State-of-the-art SOI transistors require a very small body. This paper examines the effects of body thinning and thin-gate oxide in SOI MOSFETs on their electrical characteristics. In particular, the influence of film thickness on the interface coupling and carrier mobility is discussed. Due to coupling, the separation between the front and back channels is difficult in ultra-thin SOI MOSFETs. The implementation of the front-gate split C-V method and its limitations for determining the front- and back-channel mobility are described. The mobility in the front channel is smaller than that in the back channel due to additional Coulomb scattering. We also discuss the 3D coupling effects that occur in FinFETs with triple-gate and omega-gate configurations. In low-doped or tall fins the corner effect is suppressed. Narrow devices are virtually immune to substrate effects due to a strong lateral coupling between the two lateral sides of the gate. Short-channel effects are drastically reduced when the lateral coupling screens the drain influence.
Źródło:: Journal of Telecommunications and Information Technology; 2007, 2; 14-24
1509-4553
1899-8852
Pojawia się w:: Journal of Telecommunications and Information Technology
Dostawca treści:: Biblioteka Nauki

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