Temat: system speed - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Flywheel energy storage control system with the system operating status control via the Internet
Autorzy:: Baszyński, M.
Siostrzonek, T.
Powiązania:: https://bibliotekanauki.pl/articles/141074.pdf
Data publikacji:: 2014
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: BLDCPM
high speed drive
flywheel energy storage system
FPGA
Opis:: Modern electronics systems consist of not only with the power electronics converters, but also with the friendly user interface which allow you to read the operating parameters and change them. The simplest solution of the user interface is to use alphanumeric display which displays information about the state of the converter. With a few additional buttons you can change the settings. This solution is simple, inexpensive but allows only local control (within walking distance from the system) and the number of displayed information is low. You can create extensive menu, but it causes problems with access to information. This paper presents the example of a rotating energy storage universal solution which is lack of the above mentioned disadvantages.
Źródło:: Archives of Electrical Engineering; 2014, 63, 3; 457-467
1427-4221
2300-2506
Pojawia się w:: Archives of Electrical Engineering
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Determining the mechanical losses in a high-speed motor on the ex ample of a flywheel energy storage system
Autorzy:: Baszyński, M.
Piróg, S.
Powiązania:: https://bibliotekanauki.pl/articles/141244.pdf
Data publikacji:: 2012
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: FPGA
szybki napęd
BLDCPM
high speed drive
flywheel energy storage system
Opis:: Department of Electrical Drive and Industrial Equipment University of Science and Technology (AGH) The article describes the method of determining mechanical losses and electromagnetic motor torque on the example of a flywheel energy storage system utilizing BLDC motor. The description of the test stand contains: the topology of power factor correction boost rectifier, an inverter supplying the BLDC motor, and the measuring system. The detailed experimental results are included in the paper.
Źródło:: Archives of Electrical Engineering; 2012, 61, 3; 299-313
1427-4221
2300-2506
Pojawia się w:: Archives of Electrical Engineering
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 3.

Tytuł:: The use of hierarchical structures for design of high-speed digital comparators on FPGA/SoC
Autorzy:: Salauyou, V.
Powiązania:: https://bibliotekanauki.pl/articles/114377.pdf
Data publikacji:: 2016
Wydawca:: Stowarzyszenie Inżynierów i Techników Mechaników Polskich
Tematy:: comparator
high-speed
hierarchical structures
system on chip
field programmable logic array
FPGA
SoC
Opis:: This paper presents a design method of high-speed digital comparators on FPGA/SoC by means of hierarchical structures. A synthesis technique of hierarchical structures for comparators is offered. In this technique, the comparator best hierarchical structure is empirically found for a certain FPGA family. The proposed method allows reducing a delay for 256-bits comparators by 1.245 to 2.516 times as compared with a traditional approach, and for 512-bits comparators by 3.399 times. The method also allows reducing an area by 40.2% on occasion.
Źródło:: Measurement Automation Monitoring; 2016, 62, 6; 196-198
2450-2855
Pojawia się w:: Measurement Automation Monitoring
Dostawca treści:: Biblioteka Nauki

Artykuł

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