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Wyszukujesz frazę "circuit analysis" wg kryterium: Temat


Wyświetlanie 1-6 z 6
Tytuł:
Computation method for analysis of sliding faults in power systems
Autorzy:
Machowski, Jan
Robak, Sylwester
Powiązania:
https://bibliotekanauki.pl/articles/2090700.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
power system
short-circuit analysis
sliding faults
computation method
system zasilania
analiza zwarć
wady ślizgowe
metody obliczeniowe
Opis:
Short-circuit analysis is conducted based on the nodal impedance matrix, which is the inversion of the nodal admittance matrix. If analysis is conducted for sliding faults, then for each fault location four elements of the nodal admittance matrix are subject to changes and the calculation of the admittance matrix inversion needs to be repeated many times. For large-scale networks such an approach is time consuming and unsatisfactory. This paper proves that for each new fault location a new impedance matrix can be found without recalculation of the matrix inversion. It can be found by a simple extension of the initial nodal impedance matrix calculated once for the input model of the network. This paper derives formulas suitable for such an extension and presents a flowchart of the computational method. Numerical tests performed for a test power system confirm the validity and usefulness of the proposed method.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 1; e135841, 1--9
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Computation method for analysis of sliding faults in power systems
Autorzy:
Machowski, Jan
Robak, Sylwester
Powiązania:
https://bibliotekanauki.pl/articles/2173554.pdf
Data publikacji:
2021
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
power system
short-circuit analysis
sliding faults
computation method
system zasilania
analiza zwarć
wady ślizgowe
metody obliczeniowe
Opis:
Short-circuit analysis is conducted based on the nodal impedance matrix, which is the inversion of the nodal admittance matrix. If analysis is conducted for sliding faults, then for each fault location four elements of the nodal admittance matrix are subject to changes and the calculation of the admittance matrix inversion needs to be repeated many times. For large-scale networks such an approach is time consuming and unsatisfactory. This paper proves that for each new fault location a new impedance matrix can be found without recalculation of the matrix inversion. It can be found by a simple extension of the initial nodal impedance matrix calculated once for the input model of the network. This paper derives formulas suitable for such an extension and presents a flowchart of the computational method. Numerical tests performed for a test power system confirm the validity and usefulness of the proposed method.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2021, 69, 1; art. no. e135841
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A local truncation error estimation for a SubIval solver
Autorzy:
Sowa, M.
Powiązania:
https://bibliotekanauki.pl/articles/202058.pdf
Data publikacji:
2018
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
fractional calculus
numerical method
adaptive step size
local truncation error
circuit analysis
rachunek różniczkowy
metoda numeryczna
analiza obwodów
Opis:
The paper concerns an analysis for SubIval (the subinterval-based method for fractional derivative computations in initial value problems). A time step size adaptive solver is discussed, for which the formula of a local truncation error is derived. A general form for a system of linear equations is given for the considered class of problems (for which the analysis is performed in the paper). Two circuit examples are introduced to display the usefulness of the SubIval solver. For the examples that have been chosen it is possible to obtain referential solutions through completely different methods. The results obtained through the numerical solver are compared with evaluations of the referential solutions. The error estimation results obtained for the time steps of the SubIval solver are compared with the actual errors, being the differences between the numerical solutions and the referential solutions. The paper also contains a comparison of the accuracy of results obtained through the SubIval solver with the accuracies of other solvers.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2018, 66, 4; 475-484
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Analysis of electromagnetic performance of the interior permanent magnet brushless DC motor with stator slot skewed structure based on quasi-3D moving electromagnetic-field circuit coupling calculation
Autorzy:
Gan, Xue-Gui
Fan, Zhen-Nan
Li, Jing-Can
Powiązania:
https://bibliotekanauki.pl/articles/2042795.pdf
Data publikacji:
2022
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
interior permanent magnet brushless DC motor
quasi-three-dimensional electromagnetic-field circuit coupling analysis
stator slot skew
Opis:
This paper takes a 50 kW interior permanent magnet brushless DC motor as an example, and explores the influence of the degree of stator slot skew on the overall motor magnetic density and air gap magnetic density; then reveals the influences of stator slot skewed structure on a series of key electromagnetic properties like no-load back electromotive force (B-EMF), cogging torque, electromagnetic torque, torque fluctuation, electromagnetic loss, input power, output power and operating efficiency. On this basis, a relatively best range of the skew degrees is obtained. The research work in this paper has direct reference value for the further improvement of design and manufacture, operation and maintenance, control and protection of such motors.
Źródło:
Archives of Electrical Engineering; 2022, 71, 1; 159-174
1427-4221
2300-2506
Pojawia się w:
Archives of Electrical Engineering
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
DC Large-Scale Simulation of Nonlinear Circuits on Parallel Processors
Autorzy:
Udave, D. E. C.
Ogrodzki, J.
de Anda, G. M. A.
Powiązania:
https://bibliotekanauki.pl/articles/226087.pdf
Data publikacji:
2012
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
circuit simulation
parallel computation
DC analysis
circuit decomposition
Opis:
Newton-Raphson DC analysis of large-scale nonlinear circuits may be an extremely time consuming process even if sparse matrix techniques and bypassing of nonlinear models calculation are used. A slight decrease in the time required for this task may be enabled on multi-core, multithread computers if the calculation of the mathematical models for the nonlinear elements as well as the stamp management of the sparse matrix entries is managed through concurrent processes. In this paper it is shown how the numerical complexity of this problem (and thus its solution time) can be further reduced via the circuit decomposition and parallel solution of blocks taking as a departure point the Bordered-Block Diagonal (BBD) matrix structure. This BBD-parallel approach may give a considerable profit though it is strongly dependent on the system topology. This paper presents a theoretical foundation of the algorithm, its implementation, and numerical complexity analysis in virtue of practical measurements of matrix operations.
Źródło:
International Journal of Electronics and Telecommunications; 2012, 58, 3; 285-295
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Probabilistic elements in analysis of performance of multiprocessor systems
Autorzy:
Taborek, K.
Hrynkiewicz, E.
Powiązania:
https://bibliotekanauki.pl/articles/201505.pdf
Data publikacji:
2014
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
arbitration circuit
multiprocessor system
performance analysis
queueing model
arbitraż
system wieloprocesorowy
analiza wydajności
model kolejkowy
Opis:
The paper presents important probabilistic elements that should be taken into consideration in the analysis of performance of classical multiprocessor systems. These elements represent the following quantities: modified arrival rate for processor requests and a few probabilities, which determine the frequency of certain events when a multiprocessor system is working. There are four peculiar events: service of another job, existence of the queue, a processor request while the given task is waiting into the queue and the return of another task into the queue while the given task is waiting in the queue. The first three events happen more often when a system consists of less number of processors, whereas the fourth event happens more often when more processors work in a system. Including (or not) the probabilities of these events to the analysis of performance of multiprocessor systems exerts its much influence on the precision of computations. All the mentioned quantities were described in detail. Formulas for these quantities were derived. Examples of applications of the formulas to the prediction of performance of various multiprocessor systems were presented.
Źródło:
Bulletin of the Polish Academy of Sciences. Technical Sciences; 2014, 62, 4; 765-771
0239-7528
Pojawia się w:
Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-6 z 6

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