Autor: Szczesny, P. - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Switched Current Sigma-Delta Modulator with a New Comparator Structure Designed Based on VHDL-AMS Description
Autorzy:: Śniatała, P
Handkiewicz, A
Naumowicz, M.
Szczęsny, S.
Melosik, M.
Katarzyński, P.
Kropidłowski, M.
Powiązania:: https://bibliotekanauki.pl/articles/227188.pdf
Data publikacji:: 2013
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: switched current
VHDL-AMS
sigma-delta modulator
Opis:: The paper presents a VHDL-AMS based approach to the Switched-Current (SI) Sigma-Delta Modulator design. The prototype VHDL-AMS description, with the help of elaborated EDA tools, is automatically translated into the SI realization. Another tool helps the designer to create the layout. The paper also describes a new current mode comparator, which is used in the design. Postlayout simulation results are presented.
Źródło:: International Journal of Electronics and Telecommunications; 2013, 59, 4; 391-396
2300-1933
Pojawia się w:: International Journal of Electronics and Telecommunications
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Current mode sigma-delta modulator designed with the help of transistor’s size optimization tool
Autorzy:: Śniatała, P.
Naumowicz, M.
Handkiewicz, A.
Szczęsny, S.
Melo, J. L. A.
Paulino, N.
Goes, J.
Powiązania:: https://bibliotekanauki.pl/articles/201254.pdf
Data publikacji:: 2015
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: sigma-delta
current comparator
CAE
komparator
Opis:: The paper presents a second order current mode sigma-delta modulator designed with the help of a new elaborated tool to optimize the transistor sizes. The circuit is composed of two continuous time loop filters, a current comparator and a one bit DAC with a current output. The resulting circuit, designed in a 65 nm 1.2 V CMOS technology, has a bandwidth of 2 MHz for a clock frequency of 250 MHz. The electrical simulation results show that it achieves a maximum signal-to-noise-plus-distortion ratio (SNDR) of 53.6 dB while dissipating 93 μW, which corresponds to an efficiency of 59.7 fJ/conv. The fully current mode structure makes the circuit suitable to be applied in a current mode signal processing like biosensors or image pixels arrays.
Źródło:: Bulletin of the Polish Academy of Sciences. Technical Sciences; 2015, 63, 4; 919-922
0239-7528
Pojawia się w:: Bulletin of the Polish Academy of Sciences. Technical Sciences
Dostawca treści:: Biblioteka Nauki

Artykuł

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