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    Tytuł:
    Technology mapping oriented to adaptive logic modules
    Autorzy:
    Kubica, M.
    Kania, D.
    Powiązania:
    https://bibliotekanauki.pl/articles/200466.pdf
    Data publikacji:
    2019
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    decomposition
    logic synthesis
    technology mapping
    ALM
    Opis:
    This paper presents an innovative method of technology mapping of the circuits in ALM appearing in FPGA devices by Intel. The essence of the idea is based on using triangle tables that are connected with different configurations of blocks. The innovation of the proposed method focuses on the possibility of choosing an appropriate configuration of an ALM block, which is connected with choosing an appropriate decomposition path. The effectiveness of the proposed technique of technology mapping is proved by experiments conducted on combinational and sequential circuits.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2019, 67, 5; 947-956
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    SMTBDD : New Form of BDD for Logic Synthesis
    Autorzy:
    Kubica, M.
    Kania, D.
    Powiązania:
    https://bibliotekanauki.pl/articles/226064.pdf
    Data publikacji:
    2016
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    logic synthesis
    SMTBDD
    decomposition
    technology mapping
    FPGA
    digital circuits
    Opis:
    The main purpose of the paper is to suggest a new form of BDD - SMTBDD diagram, methods of obtaining, and its basic features. The idea of using SMTBDD diagram in the process of logic synthesis dedicated to FPGA structures is presented. The creation of SMTBDD diagrams is the result of cutting BDD diagram which is the effect of multiple decomposition. The essence of a proposed decomposition method rests on the way of determining the number of necessary ‘g’ bounded functions on the basis of the content of a root table connected with an appropriate SMTBDD diagram. The article presents the methods of searching non-disjoint decomposition using SMTBDD diagrams. Besides, it analyzes the techniques of choosing cutting levels as far as effective technology mapping is concerned. The paper also discusses the results of the experiments which confirm the efficiency of the analyzed decomposition methods.
    Źródło:
    International Journal of Electronics and Telecommunications; 2016, 62, 1; 33-41
    2300-1933
    Pojawia się w:
    International Journal of Electronics and Telecommunications
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
    Tytuł:
    Decomposition of multi-output functions oriented to configurability of logic blocks
    Autorzy:
    Kubica, M.
    Kania, D.
    Powiązania:
    https://bibliotekanauki.pl/articles/201673.pdf
    Data publikacji:
    2017
    Wydawca:
    Polska Akademia Nauk. Czytelnia Czasopism PAN
    Tematy:
    BDD
    decomposition
    logic synthesis
    technology mapping
    rozkład
    Synteza logiczna
    Mapowanie technologii
    Opis:
    The main goal of the paper is to present a logic synthesis strategy dedicated to an LUT-based FPGA. New elements of the proposed synthesis strategy include: an original method of function decomposition, non-disjoint decomposition, and technology mapping dedicated to configurability of logic blocks. The aim of all of the proposed synthesis approaches is the sharing of appropriately configured logic blocks. Innovation of the methods is based on the way of searching decomposition, which relies on multiple cutting of an MTBDD diagram describing a multi-output function. The essence of the proposed algorithms rests on the method of unicoding dedicated to sharing resources, searching non-disjoint decomposition on the basis of the partition of root tables, and choosing the levels of diagram cutting that will guarantee the best mapping to complex logic blocks. The methods mentioned above were implemented in the MultiDec tool. The efficiency of the analyzed methods was experimentally confirmed by comparing the synthesis results with both academic and commercial tools.
    Źródło:
    Bulletin of the Polish Academy of Sciences. Technical Sciences; 2017, 65, 3; 317-331
    0239-7528
    Pojawia się w:
    Bulletin of the Polish Academy of Sciences. Technical Sciences
    Dostawca treści:
    Biblioteka Nauki
    Artykuł
      Wyświetlanie 1-3 z 3

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