- Tytuł:
- Spice simulation of substrate potential shift in HVCMOS technologies
- Autorzy:
-
Stefanucci, C.
Buccella, P.
Kayal, M.
Sallese, J.-M. - Powiązania:
- https://bibliotekanauki.pl/articles/397879.pdf
- Data publikacji:
- 2015
- Wydawca:
- Politechnika Łódzka. Wydział Mikroelektroniki i Informatyki
- Tematy:
-
Smart Power ICs
HVCMOS modeling
vertical bipolar transistor
substrate potential shift
Smart Power
modelowanie HVCMOS
pionowy tranzystor bipolarny - Opis:
- High voltage CMOS active devices inherently include a parasitic vertical PNP bipolar transistor. When activated it injects holes into the substrate causing a dangerous potential shift. In this work a spice-modeling approach based on transistor layout is presented to simulate substrate de-biasing in Smart Power ICs. The proposed model relies on a parasitic substrate network without the need of a parasitic BJT in HVCMOS compact models. The results are compared with TCAD simulations at different temperatures showing good agreement. Potential shift of the substrate is analysed for different geometrical configurations to estimate the effect of P+ grounding schemes and backside contact.
- Źródło:
-
International Journal of Microelectronics and Computer Science; 2015, 6, 4; 142-147
2080-8755
2353-9607 - Pojawia się w:
- International Journal of Microelectronics and Computer Science
- Dostawca treści:
- Biblioteka Nauki
Artykuł