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Wyszukujesz frazę "high-frequency" wg kryterium: Wszystkie pola


Wyświetlanie 1-6 z 6
Tytuł:
An accurate prediction of high-frequency circuit behaviour
Autorzy:
Yoshitomi, S.
Kimijima, H.
Kojima, K.
Kokatsu, H.
Powiązania:
https://bibliotekanauki.pl/articles/308807.pdf
Data publikacji:
2005
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
electro-magnetic simulation
SPICE
circuit test structure
RF CMOS
EKV2.6-MOS model
spiral inductor
CMOS VCO
Opis:
An accurate way to predict the behaviour of an RF analogue circuit is presented. A lot of effort is required to eliminate the inaccuracies that may generate the deviation between simulation and measurement. Efficient use of computer-aided design and incorporation of as many physical effects as possible overcomes this problem. Improvement of transistor modelling is essential, but there are many other unsolved problems affecting the accuracy of RF analogue circuit modelling. In this paper, the way of selection of accurate transistor model and the extraction of parasitic elements from the physical layout, as well as implementation to the circuit simulation will be presented using two CMOS circuit examples: an amplifier and a voltage controlled oscillator (VCO). New simulation technique, electro-magnetic (EM)-co-simulation is introduced.
Źródło:
Journal of Telecommunications and Information Technology; 2005, 1; 47-62
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
High-Frequency Power Amplitude Modulators with Class-E Tuned Amplifiers
Autorzy:
Modzelewski, J.
Mikołajewski, M.
Powiązania:
https://bibliotekanauki.pl/articles/307948.pdf
Data publikacji:
2008
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
high-efficiency amplitude modulators
non-ZVS operation
optimum operation
PSpice simulations
suboptimum operation
Opis:
A high-frequency power amplifier used in a drain amplitude modulator must have linear dependence of output HF voltage Vo versus its supply voltage VDD. This condition essential for obtaining low-level envelope distortions is met by a theoretical class-E amplifier with a linear shunt capacitance of the switch. In this paper the influence of non-linear output capacitance of the transistor in the class-E amplifier on its Vo(VDD) characteristic is analyzed using PSPICE simulations of the amplifiers operating at frequencies 0.5 MHz, 5 MHz and 7 MHz. These simulations have proven that distortions of theVo(VDD) characteristic caused by non-linear output capacitance of the transistor are only slight for all analyzed amplifiers, even for the 7 MHz amplifier without the external (linear) shunt capacitance. In contrast, the decrease of power efficiency of the class-E amplifier resulting from this effect can be significant even by 40%
Źródło:
Journal of Telecommunications and Information Technology; 2008, 4; 79-86
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
A High Capacity Energy Efficient Approach for Traffic Transmission in Cellular Networks
Autorzy:
Esmaeilifard, M.
Rahbar, A. G.
Powiązania:
https://bibliotekanauki.pl/articles/958113.pdf
Data publikacji:
2015
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
cellular networks
energy efficiency
frequency assignment
interference avoidance
transmission power control
Opis:
The efficiency of cellular networks can be improved in various aspects such as energy consumption, network capacity and interference between neighboring cells. This paper proposes a high capacity energy efficient scheme (HCEE) for data transmission in cellular networks in a country area. In this paper, the authors obtain a new equation to characterize the minimal required output power for traffic transmission between a base station (BS) and a mobile user (MU) based on the MU distance from the BS. Also, the cells boundaries (the boundary of overlapping areas of neighboring cells) by two static and dynamic approaches are specified. This work helps for better frequency allocation to MUs and allows increasing network capacity. In this paper, the analytical modeling in order to formulate the HCEE algorithm and evaluate its performance is used. The performance evaluation results show the simplicity of the HCEE algorithm and its effect on energy consumption decline, network capacity enhancement and the interference reduction.
Źródło:
Journal of Telecommunications and Information Technology; 2015, 3; 5-12
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
The Effect of High Temperature Annealing on Fluorine Distribution Profile and Electro-Physical Properties of Thin Gate Oxide Fluorinated by Silicon Dioxide RIE in CF4 Plasma
Autorzy:
Kalisz, M.
Głuszko, G.
Beck, R. B.
Powiązania:
https://bibliotekanauki.pl/articles/308059.pdf
Data publikacji:
2010
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
capacitance-voltage characteristics
current-voltage characteristics
fluorine plasma
high temperature annealing process
radio frequency reactive ion etching
Opis:
This study describes the effects of high temperature annealing performed on structures fluorinated during initial silicon dioxide reactive ion etching (RIE) process in CF4 plasma prior to the plasma enhanced chemical vapour deposition (PECVD) of the final oxide. The obtained results show that fluorine incorporated at the PECVD oxide/Si interface during RIE is very stable even at high temperatures. Application of fluorination and high temperature annealing during oxide layer fabrication significantly improved the properties of the interface (Ditmb decreased), as well as those of the bulk of the oxide layer (Qeff decreased). The integrity of the oxide (higher Vbd ) and its uniformity (Vbd distribution) are also improved.
Źródło:
Journal of Telecommunications and Information Technology; 2010, 1; 25-28
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Challenges for 10 nm MOSFET process integration
Autorzy:
Östling, M.
Malm, B. G.
Haartman, M.
Hallstedt, J.
Zhang, Z.
Hellström, P. E.
Zhang, S.
Powiązania:
https://bibliotekanauki.pl/articles/309004.pdf
Data publikacji:
2007
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
sstrained silicon
silicon-germanium
silicon-on-insulator (SOI)
high-k dielectrics
hafnium oxide
nanowire
low frequency noise
mobility
metal gate
Opis:
An overview of critical integration issues for future generation MOSFETs towards 10 nm gate length is presented. Novel materials and innovative structures are discussed. The need for high-k gate dielectrics and a metal gate electrode is discussed. Different techniques for strain-enhanced mobility are discussed. As an example, ultra thin body SOI devices with high mobility SiGe channels are demonstrated.
Źródło:
Journal of Telecommunications and Information Technology; 2007, 2; 25-32
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
DC and low-frequency noise analysis for buried SiGe channel metamorphic PMOSFETs with high Ge content
Autorzy:
Durov, S.
Mironov, O. A.
Myronov, M.
Whall, T. E.
Parker, E. H. C.
Hackbarth, T.
Hoeck, G.
Herzog, H. J.
König, U.
Känel von, H.
Powiązania:
https://bibliotekanauki.pl/articles/958103.pdf
Data publikacji:
2005
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
SiGe
metamorphic MOSFET
LF-noise
I-V
C-V
effective hole mobility
Opis:
Measurements of current drive in p-Si1-xGex MOSFETs, with x = 0.7, 0.8 reveal an enhancement ratio of over 2 times as compared to a Si device at an effective channel length of 0.55 žm. They also show a lower knee voltage in the output I-V characteristics while retaining similar values of drain induced barrier lowering, subthreshold swing, and off current for devices with a Sb punch-through stopper. For the first time, we have quantitatively explained the low-frequency noise reduction in metamorphic, high Ge content, SiGe PMOSFETs compared to Si PMOSFETs.
Źródło:
Journal of Telecommunications and Information Technology; 2005, 1; 101-111
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-6 z 6

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