- Tytuł:
- FPGA emulator of switched reluctance motor in a FIL structure
- Autorzy:
- Fabiański, B.
- Powiązania:
- https://bibliotekanauki.pl/articles/377363.pdf
- Data publikacji:
- 2016
- Wydawca:
- Politechnika Poznańska. Wydawnictwo Politechniki Poznańskiej
- Tematy:
-
FPGA
FIL
rapid prototyping
modelling
SRM
HDL coder
control system
electric drive
cosimulation - Opis:
- The use of FPGA platform in power section emulation of switched reluctance motor is presented in the article. Emulation of the power part gives many advantages in the means of rapid prototyping. Power section of the electric drive is expensive and thus need to be protected from damage. Evaluating of complicated control algorithms gives a risk to damage in the real system even if some simulation tests were made before. Introducing FPGA in the loop gives opportunity to minimize such a failure. FIL system would be time efficient when using new features of CAD/CAM simulation systems that are able to convert selected part of the system model to the FPGA environment. The article presents this process in the example of SRM drive. Model equation and its block structure are introduced. Then the way to the FIL implementation in details is shown with appropriate IDE configuration, block model adaptation and run example.
- Źródło:
-
Poznan University of Technology Academic Journals. Electrical Engineering; 2016, 87; 289-300
1897-0737 - Pojawia się w:
- Poznan University of Technology Academic Journals. Electrical Engineering
- Dostawca treści:
- Biblioteka Nauki
Artykuł