Autor: Jakusz, J. - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: A High-Efficient Low-Voltage Rectifier for CMOS Technology
Autorzy:: Jendernalik, W.
Jakusz, J.
Blakiewicz, G.
Kłosowski, M.
Powiązania:: https://bibliotekanauki.pl/articles/220356.pdf
Data publikacji:: 2016
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: CMOS rectifier
high frequency rectifier
wireless power transmission
Opis:: A new configuration of rectifier suiting CMOS technology is presented. The rectifier consists of only two n-channel MOS transistors, two capacitors and two resistors; for this reason it is very favourable in manufacturing in CMOS technology. With these features the rectifier is easy to design and cheap in production. Despite its simplicity, the rectifier has relatively good characteristics, the voltage and power efficiency, and bandwidth greater than 89%, 87%, and 1 GHz, respectively. The performed simulations and measurements of a prototype circuit fully confirmed its correct operation and advantages.
Źródło:: Metrology and Measurement Systems; 2016, 23, 2; 261-268
0860-8229
Pojawia się w:: Metrology and Measurement Systems
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Characteristics of an image sensor with early-vision processing fabricated in standard 0.35 žm CMOS technology
Autorzy:: Jendernalik, W.
Jakusz, J.
Blakiewicz, G.
Szczepański, S.
Piotrowski, R.
Powiązania:: https://bibliotekanauki.pl/articles/220599.pdf
Data publikacji:: 2012
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: CMOS imager
analogue processor array
smart sensor
vision chip
Opis:: The article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 žm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image processing algorithms. The prototype with a resolution of 32 x 32 pixels allows the acquisition and processing of images at high speed, up to 2000 frames/s. Operation of the prototypes was verified in practice using the developed software and a measurement system based on a FPGA platform.
Źródło:: Metrology and Measurement Systems; 2012, 19, 2; 191-202
0860-8229
Pojawia się w:: Metrology and Measurement Systems
Dostawca treści:: Biblioteka Nauki

Artykuł

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