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Wyszukujesz frazę "Tomaszewski, W." wg kryterium: Autor


Wyświetlanie 1-4 z 4
Tytuł:
Telecommunications network design and max-min optimization problem
Autorzy:
Ogryczak, W.
Pióro, M.
Tomaszewski, A.
Powiązania:
https://bibliotekanauki.pl/articles/309010.pdf
Data publikacji:
2005
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
network design
resource allocation
fairness
lexicographic optimization
lexicographic max-min
Opis:
Telecommunications networks are facing increasing demand for Internet services. Therefore, the problem of telecommunications network design with the objective to maximize service data flows and provide fair treatment of all services is very up-to-date. In this application, the so-called max-min fair (MMF) solution concept is widely used to formulate the resource allocation scheme. It assumes that the worst service performance is maximized and the solution is additionally regularized with the lexicographic maximization of the second worst performance, the third one, etc. In this paper we discuss solution algorithms for MMF problems related to telecommunications network design. Due to lexicographic maximization of ordered quantities, the MMF solution concept cannot be tackled by the standard optimization model (mathematical programme). However, one can formulate a sequential lexicographic optimization procedure. The basic procedure is applicable only for convex models, thus it allows to deal with basic design problems but fails if practical discrete restrictions commonly arriving in telecommunications network design are to be taken into account. Then, however, alternative sequential approaches allowing to solve non-convex MMF problems can be used.
Źródło:
Journal of Telecommunications and Information Technology; 2005, 3; 43-56
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Standardization of the compact model coding: non-fully depleted SOI MOSFET example
Autorzy:
Grabiński, W.
Tomaszewski, D.
Lemaitre, L.
Jakubowski, A.
Powiązania:
https://bibliotekanauki.pl/articles/308862.pdf
Data publikacji:
2005
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
Verilog-AMS
compact model coding
SOI MOSFET
Opis:
The initiative to standardize compact (SPICE-like) modelling has recently gained momentum in the semiconductor industry. Some of the important issues of the compact modelling must be addressed, such as accuracy, testing, availability, version control, verification and validation. Most compact models developed in the past did not account for these key issues which are of highest importance when introducing a new compact model to the semiconductor industry in particular going beyond the ITRS roadmap technological 100 nm node. An important application for non-fully depleted SOI technology is high performance microprocessors, other high speed logic chips, as well as analogue RF circuits. The IC design process requires a compact model that describes in detail the electrical characteristics of SOI MOSFET transistors. In this paper a non-fully depleted SOI MOSFET model and its Verilog-AMS description will be presented.
Źródło:
Journal of Telecommunications and Information Technology; 2005, 1; 135-141
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
Piezoresistive sensors for atomic force microscopy - numerical simulations by means of virtual wafer fab
Autorzy:
Dębski, T.
Barth, W.
Rangelow, I.W.
Domański, K.
Tomaszewski, D.
Grabiec, P.
Jakubowski, A.
Powiązania:
https://bibliotekanauki.pl/articles/307644.pdf
Data publikacji:
2001
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
atomic force microscopy (AFM)
piezoresistive sensors
technology simulation
technology characterization
Opis:
An important element in microelectronics is the comparison of the modelling and measurements results of the real semiconductor devices. Our paper describes the final results of numerical simulation of a micromechanical process sequence of the atomic force microscopy (AFM) sensors. They were obtained using the virtual wafer fab (VWF) software, which is used in the Institute of Electron Technology (IET). The technology mentioned above is used for fabrication of the AFM cantilevers, which has been designed for measurement and characterization of the surface roughness, the texturing, the grain size and the hardness. The simulation are very useful in manufacturing other microcantilever sensors.
Źródło:
Journal of Telecommunications and Information Technology; 2001, 1; 35-39
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
TSSOI as an efficient tool for diagnostics of SOI technology in Institute of Electron Technology
Autorzy:
Barański, M.
Domański, K.
Grabiec, P.
Grodner, M.
Jaroszewicz, B.
Kociubiński, A.
Kucewicz, W.
Kucharski, K.
Marczewski, J.
Niemiec, H.
Sapor, M.
Tomaszewski, D.
Powiązania:
https://bibliotekanauki.pl/articles/308825.pdf
Data publikacji:
2005
Wydawca:
Instytut Łączności - Państwowy Instytut Badawczy
Tematy:
SOI CMOS technology
pixel detector
test structure
Opis:
This paper reports a test structure for characterization of a new technology combining a standard CMOS process with pixel detector manufacturing technique. These processes are combined on a single thick-_lm SOI wafer. Preliminary results of the measurements performed on both MOS SOI transistors and dedicated SOI test structures are described in detail.
Źródło:
Journal of Telecommunications and Information Technology; 2005, 1; 85-93
1509-4553
1899-8852
Pojawia się w:
Journal of Telecommunications and Information Technology
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-4 z 4

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