Temat: circuit synthesis - Katalog OPAC zbiorów

Skocz do pozycji: 1.

Tytuł:: Optimal SAT Solver Synthesis of Quantum Circuits Representing Cryptographic Nonlinear Functions
Autorzy:: Jagielski, Adam
Powiązania:: https://bibliotekanauki.pl/articles/27311913.pdf
Data publikacji:: 2023
Wydawca:: Polska Akademia Nauk. Czasopisma i Monografie PAN
Tematy:: quantum computing
circuit synthesis
cryptography
satisfiability problem
Opis:: In this article we present a procedure that allows to synthesize optimal circuit representing any reversible function within reasonable size limits. The procedure allows to choose either the NCT or the MCT gate set and specify any number of ancillary qubits to be used in the circuit. We will explore efficacy of this procedure by synthesizing various sources of nonlinearity used in contemporary symmetric ciphers and draw conclusions about properties of those transformations in quantum setting. In particular we will try to synthesize optimal circuit representing ASCON cipher SBOX which recently won NIST competition for Lightweight Cryptography standard.
Źródło:: International Journal of Electronics and Telecommunications; 2023, 69, 2; 261--267
2300-1933
Pojawia się w:: International Journal of Electronics and Telecommunications
Dostawca treści:: Biblioteka Nauki

Artykuł

Skocz do pozycji: 2.

Tytuł:: Synthesis of FSMs Based on Architectural Decomposition with Joined Multiple Encoding
Autorzy:: Bukowiec, A.
Powiązania:: https://bibliotekanauki.pl/articles/227248.pdf
Data publikacji:: 2012
Wydawca:: Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:: Boolean algebra
circuit synthesis
field programmable gate array (FPGA)
sequential circuits
Opis:: The method of synthesis of the logic circuit of finite state machine (FSM) with Mealy's outputs is proposed in this paper. Proposed method is based on the innovate encoding of microinstructions split into subsets. Code of microinstruction is represented as a part of current state code and code of microinstruction inside of current subset. It leads to realization of FSM as s double-level structure. It leads to diminishing of number of variables required for encoding of microinstructions. Such approach permits to decrease the number of required outputs of combinational part of FSM.
Źródło:: International Journal of Electronics and Telecommunications; 2012, 58, 1; 35-41
2300-1933
Pojawia się w:: International Journal of Electronics and Telecommunications
Dostawca treści:: Biblioteka Nauki

Artykuł

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