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Wyświetlanie 1-2 z 2
Tytuł:
About Implementation of IEC 61131-3 IL Function Blocks in Standard Microcontrollers
Autorzy:
Chmiel, M.
Mocha, J.
Hrynkiewicz, E.
Polok, D.
Powiązania:
https://bibliotekanauki.pl/articles/226742.pdf
Data publikacji:
2014
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
central processing unit
programmable logic controller
microprocessor control
microprogramming
programming languages
language operators
Opis:
The paper presents considerations on implementation of function blocks of the IL language, as fragments of control programs that use these blocks. Subsequently, the predefined function blocks of the IL language have been applied to implementation in a Central Processing Unit for a programmable controller based on standard microcontroller from such families as MCS-51, AVR and ARM with the Cortex-M3 core. The considerations refer to the IL language revision that is fully compliant with the IEC-61131-3 standards. The completed theoretical analysis demonstrated that the adopted method of the module description is really reasonable and offers substantial advantages as compared to direct calls of function modules already developed as subroutines. Also the executed experiments have proved the feasibility to arrange central units of programmable controllers on the basis of standard microcontrollers and such central units may be competitive to compact CPUs available on the market for typical PLCs.
Źródło:
International Journal of Electronics and Telecommunications; 2014, 60, 1; 42-46
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
Tytuł:
An Efficient Classification of Hyperspectral Remotely Sensed Data Using Support Vector Machine
Autorzy:
Mahendra, H. N.
Mallikarjunaswamy, S.
Powiązania:
https://bibliotekanauki.pl/articles/2134051.pdf
Data publikacji:
2022
Wydawca:
Polska Akademia Nauk. Czytelnia Czasopism PAN
Tematy:
support vector machine
SVM
central processing unit
CPU
digital signal processor
DSP
field programmable gate array
FPGA
high level synthesis
HLS
hardware description language
HDL
Opis:
This work present an efficient hardware architecture of Support Vector Machine (SVM) for the classification of Hyperspectral remotely sensed data using High Level Synthesis (HLS) method. The high classification time and power consumption in traditional classification of remotely sensed data is the main motivation for this work. Therefore presented work helps to classify the remotely sensed data in real-time and to take immediate action during the natural disaster. An embedded based SVM is designed and implemented on Zynq SoC for classification of hyperspectral images. The data set of remotely sensed data are tested on different platforms and the performance is compared with existing works. Novelty in our proposed work is extend the HLS based FPGA implantation to the onboard classification system in remote sensing. The experimental results for selected data set from different class shows that our architecture on Zynq 7000 implementation generates a delay of 11.26 μs and power consumption of 1.7 Watts, which is extremely better as compared to other Field Programmable Gate Array (FPGA) implementation using Hardware description Language (HDL) and Central Processing Unit (CPU) implementation.
Źródło:
International Journal of Electronics and Telecommunications; 2022, 68, 3; 609--617
2300-1933
Pojawia się w:
International Journal of Electronics and Telecommunications
Dostawca treści:
Biblioteka Nauki
Artykuł
    Wyświetlanie 1-2 z 2

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