- Tytuł:
- VHDL-Ams Model of the Integrated Membrane Micro-Accelerometer with Delta-Sigma (Δσ) Analog-To-Digital Converter for Schematic Design Level
- Autorzy:
-
Golovatyj, А.
Teslyuk, V.
Kryvyy, R. - Powiązania:
- https://bibliotekanauki.pl/articles/411400.pdf
- Data publikacji:
- 2015
- Wydawca:
- Polska Akademia Nauk. Oddział w Lublinie PAN
- Tematy:
-
Micro-Electro-Mechanical Systems (MEMS)
micromechanical sensitive element
integrated membrane micro-accelerometer
delta-sigma modulation
pulse width modulation (PWM)
delta-sigma analog-todigital converter (ADC)
one bit digital-to-analog converter (DAC)
VHDL-AMS hardware description language
hAMSter software
schemotechnical design level - Opis:
- VHDL-Ams model of integrated membrane type micro-accelerometer with delta-sigma (ΔΣ) analog-to-digital converter for schematic design level was developed. It allows simulating movement of the sensitive element working weigh from the applied acceleration, differential capacitor and original signal capacity change, signal digitizing with the help of DeltaSigma ADC with defined micro-accelerometer structural parameters, and analyzze an integrated device at the schemotechnical design level.
- Źródło:
-
ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes; 2015, 4, 2; 65-70
2084-5715 - Pojawia się w:
- ECONTECHMOD : An International Quarterly Journal on Economics of Technology and Modelling Processes
- Dostawca treści:
- Biblioteka Nauki
Artykuł