- Tytuł:
- Hardware-aware tiling optimization for multi-core systems
- Autorzy:
-
Adamski, D.
Jabłoński, G. - Powiązania:
- https://bibliotekanauki.pl/articles/305250.pdf
- Data publikacji:
- 2017
- Wydawca:
- Akademia Górniczo-Hutnicza im. Stanisława Staszica w Krakowie. Wydawnictwo AGH
- Tematy:
-
LLVM
tiling
data locality
polyhedral model - Opis:
- This paper presents a proposal for a new tool that improves tiling efficiency for a given hardware architecture. This article also describes the correlation between the changing hardware architecture and methods of software optimization. The first chapter includes a short description of the change in hardware architecture that has occurred over the past ten years. The second chapter provides an overview of the tools that will be used in further research. The subsequent sections contain a description of the proposed hardware-aware tool for optimal tiling.
- Źródło:
-
Computer Science; 2017, 18 (2); 145-162
1508-2806
2300-7036 - Pojawia się w:
- Computer Science
- Dostawca treści:
- Biblioteka Nauki
Artykuł